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dvalin: change the default boost index
authorJiyu Yang <Jiyu.Yang@amlogic.com>
Tue, 6 Mar 2018 07:52:44 +0000 (15:52 +0800)
committerJiyu Yang <jiyu.yang@amlogic.com>
Wed, 7 Mar 2018 11:31:39 +0000 (03:31 -0800)
PD#161518
Change-Id: Ia2136bc006e28e1c9426dbd277440ab44479c43a

bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history
dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history

diff --git a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index fa31485a51a5da2abbe8a9c59ad8e9e9150ec31c..3ead511d09a488f1b51b55339018f55681674fb0 100644 (file)
--- a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -338,9 +338,12 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        ret = of_property_read_u32(gpu_dn,"def_clk",
                        &mpdata->def_clock);
        if (ret) {
-               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->dvfs_table_size/2-1);
-               mpdata->def_clock = mpdata->dvfs_table_size/2 - 1;
+               mpdata->def_clock = mpdata->scale_info.maxclk;
+               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->def_clock);
        }
+       if (mpdata->def_clock > mpdata->scale_info.maxclk)
+               mpdata->def_clock = mpdata->scale_info.maxclk;
+
        _dev_info(&pdev->dev, "default clk  is %d\n", mpdata->def_clock);
 
        dvfs_tbl = mpdata->dvfs_table;
@@ -611,8 +614,8 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        ret = of_property_read_u32(gpu_dn,"def_clk",
                        &mpdata->def_clock);
        if (ret) {
-               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->dvfs_table_size/2-1);
-               mpdata->def_clock = mpdata->dvfs_table_size/2 - 1;
+               mpdata->def_clock = mpdata->scale_info.maxclk;
+               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->def_clock);
        }
        if (mpdata->def_clock > mpdata->scale_info.maxclk)
                mpdata->def_clock = mpdata->scale_info.maxclk;
diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index fa31485a51a5da2abbe8a9c59ad8e9e9150ec31c..3ead511d09a488f1b51b55339018f55681674fb0 100644 (file)
--- a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -338,9 +338,12 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        ret = of_property_read_u32(gpu_dn,"def_clk",
                        &mpdata->def_clock);
        if (ret) {
-               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->dvfs_table_size/2-1);
-               mpdata->def_clock = mpdata->dvfs_table_size/2 - 1;
+               mpdata->def_clock = mpdata->scale_info.maxclk;
+               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->def_clock);
        }
+       if (mpdata->def_clock > mpdata->scale_info.maxclk)
+               mpdata->def_clock = mpdata->scale_info.maxclk;
+
        _dev_info(&pdev->dev, "default clk  is %d\n", mpdata->def_clock);
 
        dvfs_tbl = mpdata->dvfs_table;
@@ -611,8 +614,8 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        ret = of_property_read_u32(gpu_dn,"def_clk",
                        &mpdata->def_clock);
        if (ret) {
-               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->dvfs_table_size/2-1);
-               mpdata->def_clock = mpdata->dvfs_table_size/2 - 1;
+               mpdata->def_clock = mpdata->scale_info.maxclk;
+               dev_notice(&pdev->dev, "default clk set to %d\n", mpdata->def_clock);
        }
        if (mpdata->def_clock > mpdata->scale_info.maxclk)
                mpdata->def_clock = mpdata->scale_info.maxclk;