return -ENOMEM;
}
- priv->hw_setting.ac_queue_count = AC_NUM;
priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
priv->hw_setting.max_pkt_size = 2342;
priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
+
+ priv->hw_setting.tx_ant_num = 2;
return 0;
}
/**
* struct iwl3945_driver_hw_info
* @max_txq_num: Max # Tx queues supported
- * @ac_queue_count: # Tx queues for EDCA Access Categories (AC)
* @tx_cmd_len: Size of Tx command (but not including frame itself)
+ * @tx_ant_num: Number of TX antennas
* @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
* @rx_buf_size:
* @max_pkt_size:
*/
struct iwl3945_driver_hw_info {
u16 max_txq_num;
- u16 ac_queue_count;
u16 tx_cmd_len;
+ u16 tx_ant_num;
u16 max_rxq_size;
u32 rx_buf_size;
u32 max_pkt_size;
memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
- priv->hw_setting.ac_queue_count = AC_NUM;
priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
+
+ priv->hw_setting.tx_ant_num = 2;
+
return 0;
}
/**
* struct iwl4965_driver_hw_info
* @max_txq_num: Max # Tx queues supported
- * @ac_queue_count: # Tx queues for EDCA Access Categories (AC)
* @tx_cmd_len: Size of Tx command (but not including frame itself)
+ * @tx_ant_num: Number of TX antennas
* @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
* @rx_buffer_size:
* @max_rxq_log: Log-base-2 of max_rxq_size
*/
struct iwl4965_driver_hw_info {
u16 max_txq_num;
- u16 ac_queue_count;
u16 tx_cmd_len;
+ u16 tx_ant_num;
u16 max_rxq_size;
u32 rx_buf_size;
u32 max_pkt_size;