drm/kms/radeon: Reorder vblank and pageflip interrupt handling.
authorMario Kleiner <mario.kleiner@tuebingen.mpg.de>
Sun, 21 Nov 2010 15:59:02 +0000 (10:59 -0500)
committerDave Airlie <airlied@redhat.com>
Mon, 22 Nov 2010 01:51:27 +0000 (11:51 +1000)
In the vblank irq handler, calls to actual vblank handling,
or at least drm_handle_vblank(), need to happen before
calls to radeon_crtc_handle_flip().

Reason: The high precision pageflip timestamping
and some other pageflip optimizations will need the updated
vblank count and timestamps for the current vblank interval.

These are calculated in drm_handle_vblank(), therefore it
must go first.

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/rs600.c

index df3f37243222126eacbdaa5e2b715c2c605b9edb..25e84379e7c6ef644b683351489014579e314e31 100644 (file)
@@ -2398,13 +2398,13 @@ restart_ih:
                        switch (src_data) {
                        case 0: /* D1 vblank */
                                if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT) {
-                                       if (rdev->irq.pflip[0])
-                                               radeon_crtc_handle_flip(rdev, 0);
                                        if (rdev->irq.crtc_vblank_int[0]) {
                                                drm_handle_vblank(rdev->ddev, 0);
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
+                                       if (rdev->irq.pflip[0])
+                                               radeon_crtc_handle_flip(rdev, 0);
                                        rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
                                }
@@ -2424,13 +2424,13 @@ restart_ih:
                        switch (src_data) {
                        case 0: /* D2 vblank */
                                if (rdev->irq.stat_regs.evergreen.disp_int_cont & LB_D2_VBLANK_INTERRUPT) {
-                                       if (rdev->irq.pflip[1])
-                                               radeon_crtc_handle_flip(rdev, 1);
                                        if (rdev->irq.crtc_vblank_int[1]) {
                                                drm_handle_vblank(rdev->ddev, 1);
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
+                                       if (rdev->irq.pflip[1])
+                                               radeon_crtc_handle_flip(rdev, 1);
                                        rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
                                }
index b2e29798a99d5e9092c513a23128f9b47242a760..2316f73db6c095f3d6305f397cc48ea7132d8fef 100644 (file)
@@ -650,22 +650,22 @@ int r100_irq_process(struct radeon_device *rdev)
                }
                /* Vertical blank interrupts */
                if (status & RADEON_CRTC_VBLANK_STAT) {
-                       if (rdev->irq.pflip[0])
-                               radeon_crtc_handle_flip(rdev, 0);
                        if (rdev->irq.crtc_vblank_int[0]) {
                                drm_handle_vblank(rdev->ddev, 0);
                                rdev->pm.vblank_sync = true;
                                wake_up(&rdev->irq.vblank_queue);
                        }
+                       if (rdev->irq.pflip[0])
+                               radeon_crtc_handle_flip(rdev, 0);
                }
                if (status & RADEON_CRTC2_VBLANK_STAT) {
-                       if (rdev->irq.pflip[1])
-                               radeon_crtc_handle_flip(rdev, 1);
                        if (rdev->irq.crtc_vblank_int[1]) {
                                drm_handle_vblank(rdev->ddev, 1);
                                rdev->pm.vblank_sync = true;
                                wake_up(&rdev->irq.vblank_queue);
                        }
+                       if (rdev->irq.pflip[1])
+                               radeon_crtc_handle_flip(rdev, 1);
                }
                if (status & RADEON_FP_DETECT_STAT) {
                        queue_hotplug = true;
index 15b95724c408deaa0caf3e75e21469248ad3c113..7057b392e0052aea153ed4b8e727dae76d551088 100644 (file)
@@ -3294,13 +3294,13 @@ restart_ih:
                        switch (src_data) {
                        case 0: /* D1 vblank */
                                if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) {
-                                       if (rdev->irq.pflip[0])
-                                               radeon_crtc_handle_flip(rdev, 0);
                                        if (rdev->irq.crtc_vblank_int[0]) {
                                                drm_handle_vblank(rdev->ddev, 0);
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
+                                       if (rdev->irq.pflip[0])
+                                               radeon_crtc_handle_flip(rdev, 0);
                                        rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
                                }
@@ -3320,13 +3320,13 @@ restart_ih:
                        switch (src_data) {
                        case 0: /* D2 vblank */
                                if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) {
-                                       if (rdev->irq.pflip[1])
-                                               radeon_crtc_handle_flip(rdev, 1);
                                        if (rdev->irq.crtc_vblank_int[1]) {
                                                drm_handle_vblank(rdev->ddev, 1);
                                                rdev->pm.vblank_sync = true;
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
+                                       if (rdev->irq.pflip[1])
+                                               radeon_crtc_handle_flip(rdev, 1);
                                        rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
                                }
index 683652bea17c69f3d48e84ca85212581805a6118..9a85b1614c866cdecfa35d0c50236bda1b3b4149 100644 (file)
@@ -662,22 +662,22 @@ int rs600_irq_process(struct radeon_device *rdev)
                }
                /* Vertical blank interrupts */
                if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
-                       if (rdev->irq.pflip[0])
-                               radeon_crtc_handle_flip(rdev, 0);
                        if (rdev->irq.crtc_vblank_int[0]) {
                                drm_handle_vblank(rdev->ddev, 0);
                                rdev->pm.vblank_sync = true;
                                wake_up(&rdev->irq.vblank_queue);
                        }
+                       if (rdev->irq.pflip[0])
+                               radeon_crtc_handle_flip(rdev, 0);
                }
                if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
-                       if (rdev->irq.pflip[1])
-                               radeon_crtc_handle_flip(rdev, 1);
                        if (rdev->irq.crtc_vblank_int[1]) {
                                drm_handle_vblank(rdev->ddev, 1);
                                rdev->pm.vblank_sync = true;
                                wake_up(&rdev->irq.vblank_queue);
                        }
+                       if (rdev->irq.pflip[1])
+                               radeon_crtc_handle_flip(rdev, 1);
                }
                if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
                        queue_hotplug = true;