drm/i915/glk: Add a IS_GEN9_LP() macro

Broxton and Geminilake are both gen9lp platforms. To avoid adding
IS_GEMINILAKE() checks everywhere alongside the IS_BROXTON() ones, add a
IS_GEN9_LP() macro.

v2: Rename macro parameter to dev_priv. (Joonas)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9a76b90c25a52ec4c1587a1963fab9416cdad1f2..34f2b0da6a8110eba8cf50fe91ea3a17a084056b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -705,6 +705,7 @@ struct intel_csr {
        func(is_broxton); \
        func(is_geminilake); \
        func(is_kabylake); \
+       func(is_lp); \
        func(is_alpha_support); \
        /* Keep has_* in alphabetical order */ \
        func(has_64bit_reloc); \
@@ -2611,6 +2612,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_GEN8(dev_priv)      (!!((dev_priv)->info.gen_mask & BIT(7)))
 #define IS_GEN9(dev_priv)      (!!((dev_priv)->info.gen_mask & BIT(8)))
 
+#define IS_GEN9_LP(dev_priv)   (IS_GEN9(dev_priv) && INTEL_INFO(dev_priv)->is_lp)
+
 #define ENGINE_MASK(id)        BIT(id)
 #define RENDER_RING    ENGINE_MASK(RCS)
 #define BSD_RING       ENGINE_MASK(VCS)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ab4fe712126b13df1a1c9375b2c81c3002788fb0..389a33090707a80ed64c8cafdd44e0cbd04e4993 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -345,6 +345,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
 
 #define GEN9_LP_FEATURES \
        .gen = 9, \
+       .is_lp = 1, \
        .has_hotplug = 1, \
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
        .num_pipes = 3, \