drm/i915/dsi: Execute MIPI_SEQ_DEASSERT_RESET before calling device_ready()
authorHans de Goede <hdegoede@redhat.com>
Wed, 1 Mar 2017 13:15:01 +0000 (15:15 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 1 Mar 2017 13:57:57 +0000 (15:57 +0200)
Execute MIPI_SEQ_DEASSERT_RESET before putting the device in ready
state (LP-11), this is the sequence in which things should be done
according to the spec.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1488374106-4949-6-git-send-email-jani.nikula@intel.com
drivers/gpu/drm/i915/intel_dsi.c

index da798a579e11c46dffe54b950edb4993b34cd20b..b7b590d78b31e14f2b77ede17a1ac3b15204c289 100644 (file)
@@ -808,10 +808,13 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
        msleep(intel_dsi->panel_on_delay);
 
-       /* put device in ready state */
+       /* Deassert reset */
+       intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
+
+       /* Put device in ready state (LP-11) */
        intel_dsi_device_ready(encoder);
 
-       intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
+       /* Send initialization commands in LP mode */
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
 
        /* Enable port in pre-enable phase itself because as per hw team
@@ -915,6 +918,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_OFF);
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DISPLAY_OFF);
 
+       /* Transition to LP-00 */
        intel_dsi_clear_device_ready(encoder);
 
        if (IS_BROXTON(dev_priv)) {
@@ -938,6 +942,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
                I915_WRITE(DSPCLK_GATE_D, val);
        }
 
+       /* Assert reset */
        intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET);
 
        /* Power off, try both CRC pmic gpio and VBT */