ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
hwif->port_ops = NULL;
idx[0] = i;
* Ensure we're using MMIO
*/
default_hwif_mmiops(hwif);
- hwif->mmio = 1;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hwif->io_ports[i] = port;
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
idx[0] = hwif->index;
ide_device_add(idx, NULL);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
default_hwif_mmiops(hwif);
idx[0] = hwif->index;
continue;
ide_init_port_data(hwif, hwif->index);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
+
hwif->ata_input_data = &cris_ide_input_data;
hwif->ata_output_data = &cris_ide_output_data;
hwif->atapi_input_bytes = &cris_atapi_input_bytes;
{
default_hwif_iops(hwif);
- hwif->mmio = 1;
hwif->OUTW = mm_outw;
hwif->OUTSW = mm_outsw;
hwif->INW = mm_inw;
ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
hw.irq = ide_default_irq(io_addr);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
idx[i] = i;
}
ide_init_port_data(hwif, index);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
printk(KERN_INFO "ide%d: generic PnP IDE interface\n", index);
pnp_set_drvdata(dev, hwif);
hwif = ide_find_port_slot(d);
if (hwif) {
ide_init_port_hw(hwif, hw);
- hwif->mmio = 1;
if (config)
hwif->config_data = config;
idx[port_no] = hwif->index;
ide_init_port_data(hwif, index);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
-
idx[i] = index;
}
}
ide_init_port_data(hwif, index);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
ide_get_lock(NULL, NULL);
ide_device_add(idx, NULL);
ide_init_port_data(hwif, index);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
-
idx[i] = index;
} else
release_mem_region(res_start, res_n);
hwif = ide_find_port();
if (hwif) {
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
idx[0] = hwif->index;
}
ide_init_port_hw(mate, &hw);
mate->drives[0].select.all ^= 0x20;
mate->drives[1].select.all ^= 0x20;
- mate->mmio = 1;
idx[1] = mate->index;
if (hwif) {
hw.dev = &pdev->dev;
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
if (mmio)
default_hwif_mmiops(hwif);
ide_init_port_data(hwif, index);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
-
ide_device_add(idx, NULL);
}
if (hwif) {
ide_init_port_data(hwif, hwif->index);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
idx[i] = hwif->index;
}
hwif->dev = dev;
- hwif->mmio = 1;
-
/* If the user has selected DDMA assisted copies,
then set up a few local I/O function entry points
*/
/* Setup MMIO ops. */
default_hwif_mmiops(hwif);
- /* Prevent resource map manipulation. */
- hwif->mmio = 1;
+
hwif->chipset = ide_generic;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
*/
if (cmd_hwif0) {
ide_init_port_hw(cmd_hwif0, &hw[0]);
- cmd_hwif0->mmio = 1;
idx[0] = cmd_hwif0->index;
}
*/
if (second_port_cmd640 && cmd_hwif1) {
ide_init_port_hw(cmd_hwif1, &hw[1]);
- cmd_hwif1->mmio = 1;
idx[1] = cmd_hwif1->index;
}
printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
hwif->port_ops = &delkin_cb_port_ops;
idx[0] = i;
static void __devinit
ide_init_sgiioc4(ide_hwif_t * hwif)
{
- hwif->mmio = 1;
hwif->INB = &sgiioc4_INB;
if (hwif->dma_base == 0)
ide_hwif_t *hwif = &ide_hwifs[0];
ide_init_port_hw(hwif, &hw);
- hwif->mmio = 1;
hwif->pio_mask = ATA_PIO4;
hwif->port_ops = &m8xx_port_ops;
ide_hwif_t *mate = &ide_hwifs[1];
ide_init_port_hw(mate, &hw);
- mate->mmio = 1;
mate->pio_mask = ATA_PIO4;
mate->port_ops = &m8xx_port_ops;
default_hwif_mmiops(hwif);
hwif->OUTBSYNC = pmac_outbsync;
- /* Tell common code _not_ to mess with resources */
- hwif->mmio = 1;
hwif->hwif_data = pmif;
ide_init_port_hw(hwif, hw);
hwif->cbl = pmif->cable_80 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;