clk: rockchip: rk3036: rename emac ext source clock
authorXing Zheng <zhengxing@rock-chips.com>
Thu, 7 Jan 2016 12:17:36 +0000 (20:17 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Sat, 16 Jan 2016 15:01:21 +0000 (16:01 +0100)
There is only support rmii in the RK3036, so we should use the correct
ext clock name as described in the TRM.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
[update dt-binding document as well]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
drivers/clk/rockchip/clk-rk3036.c

index ace05992a262592fb22f88db5c2e13036e20c015..20df350b9ef3d491b3e2e714f8877d74477afcd8 100644 (file)
@@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following
 clock-output-names:
  - "xin24m" - crystal input - required,
  - "ext_i2s" - external I2S clock - optional,
- - "ext_gmac" - external GMAC clock - optional
+ - "rmii_clkin" - external EMAC clock - optional
 
 Example: Clock controller node:
 
index 1f00fab72dfbfc597416fdeda51fa9e0937e36a6..bc7fbac83ab74dfca9e534401bc430f629d01357 100644 (file)
@@ -133,7 +133,7 @@ PNAME(mux_spdif_p)  = { "spdif_src", "spdif_frac", "xin12m" };
 PNAME(mux_uart0_p)     = { "uart0_src", "uart0_frac", "xin24m" };
 PNAME(mux_uart1_p)     = { "uart1_src", "uart1_frac", "xin24m" };
 PNAME(mux_uart2_p)     = { "uart2_src", "uart2_frac", "xin24m" };
-PNAME(mux_mac_p)       = { "mac_pll_src", "ext_gmac" };
+PNAME(mux_mac_p)       = { "mac_pll_src", "rmii_clkin" };
 PNAME(mux_dclk_p)      = { "dclk_lcdc", "dclk_cru" };
 
 static struct rockchip_pll_clock rk3036_pll_clks[] __initdata = {