dts: Add bindings for APM X-Gene SoC ethernet driver

This patch adds bindings for APM X-Gene SoC ethernet driver.

Signed-off-by: Iyappan Subramanian <isubramanian@apm.com>
Signed-off-by: Ravi Patel <rapatel@apm.com>
Signed-off-by: Keyur Chudgar <kchudgar@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/arm64/boot/dts/apm-mustang.dts b/arch/arm64/boot/dts/apm-mustang.dts
index 6541962f5d7035f5d5cf136e49c3dce57e841e4a..b2f56229aa5e5f520ae5d81aea903bbee24ea02c 100644 (file)
--- a/arch/arm64/boot/dts/apm-mustang.dts
+++ b/arch/arm64/boot/dts/apm-mustang.dts
@@ -28,3 +28,7 @@
 &serial0 {
        status = "ok";
 };
+
+&menet {
+       status = "ok";
+};

diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
index 40aa96ce13c4c1d44ab6aaac1aa13b0c938ab6aa..c0aceef7f5b32067be4a26a72de0316f7639ed6a 100644 (file)
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -167,14 +167,13 @@
                                clock-output-names = "ethclk";
                        };
 
-                       eth8clk: eth8clk {
+                       menetclk: menetclk {
                                compatible = "apm,xgene-device-clock";
                                #clock-cells = <1>;
                                clocks = <&ethclk 0>;
-                               clock-names = "eth8clk";
                                reg = <0x0 0x1702C000 0x0 0x1000>;
                                reg-names = "csr-reg";
-                               clock-output-names = "eth8clk";
+                               clock-output-names = "menetclk";
                        };
 
                        sataphy1clk: sataphy1clk@1f21c000 {
@@ -397,5 +396,30 @@
                        #clock-cells = <1>;
                        clocks = <&rtcclk 0>;
                };
+
+               menet: ethernet@17020000 {
+                       compatible = "apm,xgene-enet";
+                       status = "disabled";
+                       reg = <0x0 0x17020000 0x0 0xd100>,
+                             <0x0 0X17030000 0x0 0X400>,
+                             <0x0 0X10000000 0x0 0X200>;
+                       reg-names = "enet_csr", "ring_csr", "ring_cmd";
+                       interrupts = <0x0 0x3c 0x4>;
+                       dma-coherent;
+                       clocks = <&menetclk 0>;
+                       local-mac-address = [00 01 73 00 00 01];
+                       phy-connection-type = "rgmii";
+                       phy-handle = <&menetphy>;
+                       mdio {
+                               compatible = "apm,xgene-mdio";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               menetphy: menetphy@3 {
+                                       compatible = "ethernet-phy-id001c.c915";
+                                       reg = <0x3>;
+                               };
+
+                       };
+               };
        };
 };