drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C

DSI Pll1 is used for enabling DSI on Port C.

v2: Addressed review comments of Jani
    - Used & operator instead of == for intel_dsi->ports

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index 8957f1099a1f4142efe241228862c64f187f60f6..3622d0bafdf8ad0565dd7284ad628125043034d6 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -241,9 +241,10 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
                return;
        }
 
-       dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
+       if (intel_dsi->ports & (1 << PORT_A))
+               dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
 
-       if (intel_dsi->dual_link)
+       if (intel_dsi->ports & (1 << PORT_C))
                dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL;
 
        DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",