[ARM] 4987/1: S3C24XX: Ensure watchdog reset initiated from cached code.
authorBen Dooks <ben-linux@fluff.org>
Tue, 15 Apr 2008 23:15:20 +0000 (00:15 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 17 Apr 2008 16:04:41 +0000 (17:04 +0100)
There seems to be some problem with at-least the S3C2440 and
bus traffic during an reset. It is unlikely, but still possible
that the system will hang in such a way that the watchdog cannot
get the system out of the state it is in.

Change to making the code that calls the watchdog reset run from
cached memory so that instruction fetches have quiesced before the
watchdog fires.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/plat-s3c24xx/cpu.c
include/asm-arm/arch-s3c2410/system-reset.h [new file with mode: 0644]
include/asm-arm/arch-s3c2410/system.h

index f513ab083b8f24c9106253b65c8fc185237cfad3..f5699cadb0c3737557b2ab2d66b0ac2f08fdb4a1 100644 (file)
 #include <linux/ioport.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
+#include <linux/delay.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
 #include <asm/io.h>
 #include <asm/delay.h>
+#include <asm/cacheflush.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <asm/arch/system-reset.h>
+
 #include <asm/arch/regs-gpio.h>
 #include <asm/plat-s3c/regs-serial.h>
 
@@ -203,6 +207,27 @@ static unsigned long s3c24xx_read_idcode_v4(void)
 #endif
 }
 
+/* Hook for arm_pm_restart to ensure we execute the reset code
+ * with the caches enabled. It seems at least the S3C2440 has a problem
+ * resetting if there is bus activity interrupted by the reset.
+ */
+static void s3c24xx_pm_restart(char mode)
+{
+       if (mode != 's') {
+               unsigned long flags;
+
+               local_irq_save(flags);
+               __cpuc_flush_kern_all();
+               __cpuc_flush_user_all();
+
+               arch_reset(mode);
+               local_irq_restore(flags);
+       }
+
+       /* fallback, or unhandled */
+       arm_machine_restart(mode);
+}
+
 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 {
        unsigned long idcode = 0x0;
@@ -230,6 +255,8 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
                panic("Unsupported S3C24XX CPU");
        }
 
+       arm_pm_restart = s3c24xx_pm_restart;
+
        (cpu->map_io)(mach_desc, size);
 }
 
diff --git a/include/asm-arm/arch-s3c2410/system-reset.h b/include/asm-arm/arch-s3c2410/system-reset.h
new file mode 100644 (file)
index 0000000..1615bce
--- /dev/null
@@ -0,0 +1,64 @@
+/* linux/include/asm-arm/arch-s3c2410/system-reset.h
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *     Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 - System define for arch_reset() function
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+
+#include <asm/plat-s3c/regs-watchdog.h>
+#include <asm/arch/regs-clock.h>
+
+#include <linux/clk.h>
+#include <linux/err.h>
+
+extern void (*s3c24xx_reset_hook)(void);
+
+static void
+arch_reset(char mode)
+{
+       struct clk *wdtclk;
+
+       if (mode == 's') {
+               cpu_reset(0);
+       }
+
+       if (s3c24xx_reset_hook)
+               s3c24xx_reset_hook();
+
+       printk("arch_reset: attempting watchdog reset\n");
+
+       __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
+
+       wdtclk = clk_get(NULL, "watchdog");
+       if (!IS_ERR(wdtclk)) {
+               clk_enable(wdtclk);
+       } else
+               printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
+
+       /* put initial values into count and data */
+       __raw_writel(0x80, S3C2410_WTCNT);
+       __raw_writel(0x80, S3C2410_WTDAT);
+
+       /* set the watchdog to go and reset... */
+       __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
+                    S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
+
+       /* wait for reset to assert... */
+       mdelay(500);
+
+       printk(KERN_ERR "Watchdog reset failed to assert reset\n");
+
+       /* delay to allow the serial port to show the message */
+       mdelay(50);
+
+       /* we'll take a jump through zero as a poor second */
+       cpu_reset(0);
+}
index 14de4e596f87b170661faad4cabe21deeb7019aa..ad258085e53b571c82693e4a55179cfdd4a26e1f 100644 (file)
 #include <asm/arch/idle.h>
 #include <asm/arch/reset.h>
 
-#include <asm/plat-s3c/regs-watchdog.h>
 #include <asm/arch/regs-clock.h>
 
-#include <linux/clk.h>
-#include <linux/err.h>
-
 void (*s3c24xx_idle)(void);
 void (*s3c24xx_reset_hook)(void);
 
@@ -59,44 +55,4 @@ static void arch_idle(void)
                s3c24xx_default_idle();
 }
 
-static void
-arch_reset(char mode)
-{
-       struct clk *wdtclk;
-
-       if (mode == 's') {
-               cpu_reset(0);
-       }
-
-       if (s3c24xx_reset_hook)
-               s3c24xx_reset_hook();
-
-       printk("arch_reset: attempting watchdog reset\n");
-
-       __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
-
-       wdtclk = clk_get(NULL, "watchdog");
-       if (!IS_ERR(wdtclk)) {
-               clk_enable(wdtclk);
-       } else
-               printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
-
-       /* put initial values into count and data */
-       __raw_writel(0x80, S3C2410_WTCNT);
-       __raw_writel(0x80, S3C2410_WTDAT);
-
-       /* set the watchdog to go and reset... */
-       __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
-                    S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
-
-       /* wait for reset to assert... */
-       mdelay(500);
-
-       printk(KERN_ERR "Watchdog reset failed to assert reset\n");
-
-       /* delay to allow the serial port to show the message */
-       mdelay(50);
-
-       /* we'll take a jump through zero as a poor second */
-       cpu_reset(0);
-}
+#include <asm/arch/system-reset.h>