net: stmmac: rx watchdog config prepared for multiple queues
authorJoao Pinto <Joao.Pinto@synopsys.com>
Wed, 15 Mar 2017 11:04:50 +0000 (11:04 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 15 Mar 2017 21:44:32 +0000 (14:44 -0700)
This patch adds rx watchdog configuration for all queues.

Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/common.h
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

index 6dfb7f31898e94d70f4602e6e25b5b08f69b1f49..5fa23b13d3cd0150e02cdef31da1609ad3416076 100644 (file)
@@ -443,7 +443,7 @@ struct stmmac_dma_ops {
        void (*get_hw_feature)(void __iomem *ioaddr,
                               struct dma_features *dma_cap);
        /* Program the HW RX Watchdog */
-       void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt);
+       void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt, u32 number_chan);
        void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len);
        void (*set_rx_ring_len)(void __iomem *ioaddr, u32 len);
        void (*set_rx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
index d3654a4470461e1f44282fac163dbcd9b6827df6..471a9aa6ac94c14d46d4dcf2d956965948193c56 100644 (file)
@@ -247,7 +247,8 @@ static void dwmac1000_get_hw_feature(void __iomem *ioaddr,
        dma_cap->enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
 }
 
-static void dwmac1000_rx_watchdog(void __iomem *ioaddr, u32 riwt)
+static void dwmac1000_rx_watchdog(void __iomem *ioaddr, u32 riwt,
+                                 u32 number_chan)
 {
        writel(riwt, ioaddr + DMA_RX_WATCHDOG);
 }
index 6285e8ad340de2ceb393482076ee7375e8251cf0..74177f9d640bddef138d46da6adcaa32d693d4f0 100644 (file)
@@ -174,12 +174,12 @@ static void dwmac4_dump_dma_regs(void __iomem *ioaddr, u32 *reg_space)
                _dwmac4_dump_dma_regs(ioaddr, i, reg_space);
 }
 
-static void dwmac4_rx_watchdog(void __iomem *ioaddr, u32 riwt)
+static void dwmac4_rx_watchdog(void __iomem *ioaddr, u32 riwt, u32 number_chan)
 {
-       int i;
+       u32 chan;
 
-       for (i = 0; i < DMA_CHANNEL_NB_MAX; i++)
-               writel(riwt, ioaddr + DMA_CHAN_RX_WATCHDOG(i));
+       for (chan = 0; chan < number_chan; chan++)
+               writel(riwt, ioaddr + DMA_CHAN_RX_WATCHDOG(chan));
 }
 
 static void dwmac4_dma_rx_chan_op_mode(void __iomem *ioaddr, int mode,
index 61b9369a041e1af91fab7e99869da36e467ceadc..16808e48ca1cf7bbd4237967ce0497caffc52808 100644 (file)
@@ -730,6 +730,7 @@ static int stmmac_set_coalesce(struct net_device *dev,
                               struct ethtool_coalesce *ec)
 {
        struct stmmac_priv *priv = netdev_priv(dev);
+       u32 rx_cnt = priv->plat->rx_queues_to_use;
        unsigned int rx_riwt;
 
        /* Check not supported parameters  */
@@ -768,7 +769,7 @@ static int stmmac_set_coalesce(struct net_device *dev,
        priv->tx_coal_frames = ec->tx_max_coalesced_frames;
        priv->tx_coal_timer = ec->tx_coalesce_usecs;
        priv->rx_riwt = rx_riwt;
-       priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt);
+       priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt, rx_cnt);
 
        return 0;
 }
index 79a792a0c12e629b4d1d0202c718e34232faadc4..00d0f5ea76820f46c3b524841739d57728b7579b 100644 (file)
@@ -1915,6 +1915,7 @@ static void stmmac_mtl_configuration(struct stmmac_priv *priv)
 static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)
 {
        struct stmmac_priv *priv = netdev_priv(dev);
+       u32 rx_cnt = priv->plat->rx_queues_to_use;
        int ret;
 
        /* DMA initialization and SW reset */
@@ -1988,7 +1989,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)
 
        if ((priv->use_riwt) && (priv->hw->dma->rx_watchdog)) {
                priv->rx_riwt = MAX_DMA_RIWT;
-               priv->hw->dma->rx_watchdog(priv->ioaddr, MAX_DMA_RIWT);
+               priv->hw->dma->rx_watchdog(priv->ioaddr, MAX_DMA_RIWT, rx_cnt);
        }
 
        if (priv->hw->pcs && priv->hw->mac->pcs_ctrl_ane)