PD# 87909: for chip detect
authorjintao.xu <jintao.xu@amlogic.com>
Thu, 13 Mar 2014 11:34:20 +0000 (19:34 +0800)
committerKasin Lee <kasin.li@amlogic.com>
Wed, 5 Nov 2014 07:47:34 +0000 (15:47 +0800)
Conflicts:

mali/common/mali_gp.c
mali/platform/meson_main.c

Change-Id: I35b05a179ddd4c80b276f79f5ed8bd8378ac6905

mali/common/mali_gp.c
mali/common/mali_group.c
mali/common/mali_pp.c
mali/platform/mali_platform.h [changed mode: 0644->0755]
mali/platform/meson_main.c

index 1e633f2444497bac1a268aa61c06edd13568723b..e3eb425ba6287ab76fb6eb6ce360fa56bb0ef090 100755 (executable)
@@ -19,6 +19,8 @@
 #include "mali_osk_profiling.h"
 #endif
 
+#include <mali_platform.h>
+
 static struct mali_gp_core *mali_global_gp_core = NULL;
 
 /* Interrupt handlers */
@@ -109,6 +111,8 @@ _mali_osk_errcode_t mali_gp_stop_bus_wait(struct mali_gp_core *core)
 
        if (MALI_REG_POLL_COUNT_FAST == i) {
                MALI_PRINT_ERROR(("Mali GP: Failed to stop bus on %s\n", core->hw_core.description));
+               if (mali_gp_reset_fail < 65533)
+                       mali_gp_reset_fail++;
                return _MALI_OSK_ERR_FAULT;
        }
        return _MALI_OSK_ERR_OK;
@@ -176,6 +180,8 @@ _mali_osk_errcode_t mali_gp_reset_wait(struct mali_gp_core *core)
        if (i == MALI_REG_POLL_COUNT_FAST) {
                MALI_PRINT_ERROR(("Mali GP: Failed to reset core %s, rawstat: 0x%08x\n",
                                  core->hw_core.description, rawstat));
+               if (mali_gp_reset_fail < 65533)
+                       mali_gp_reset_fail++;
                return _MALI_OSK_ERR_FAULT;
        }
 
index 8c35a2ddb38a9533953a9e09b03b7d6dcf527c0b..d2b0359f215bea336650f34bc17c3a4a4caf287d 100755 (executable)
@@ -28,6 +28,7 @@
 #include <trace/events/gpu.h>
 #endif
 
+#include <mali_platform.h>
 
 static void mali_group_bottom_half_mmu(void *data);
 static void mali_group_bottom_half_gp(void *data);
@@ -1953,6 +1954,8 @@ static void mali_group_timeout(void *data)
 
        group->core_timed_out = MALI_TRUE;
 
+       if (mali_core_timeout < 65533)
+               mali_core_timeout++;
        if (NULL != group->gp_core) {
                MALI_DEBUG_PRINT(2, ("Mali group: TIMEOUT on %s\n", mali_gp_get_hw_core_desc(group->gp_core)));
                _mali_osk_wq_schedule_work(group->bottom_half_work_gp);
index cd172201bcdc523c3b66db9d511bc90e3c26705e..31cb851d8132d1f9d6a0028237a666f70c844acb 100755 (executable)
@@ -20,6 +20,8 @@
 #include "mali_osk_profiling.h"
 #endif
 
+#include <mali_platform.h>
+
 /* Number of frame registers on Mali-200 */
 #define MALI_PP_MALI200_NUM_FRAME_REGISTERS ((0x04C/4)+1)
 /* Number of frame registers on Mali-300 and later */
@@ -148,6 +150,8 @@ _mali_osk_errcode_t mali_pp_stop_bus_wait(struct mali_pp_core *core)
 
        if (MALI_REG_POLL_COUNT_FAST == i) {
                MALI_PRINT_ERROR(("Mali PP: Failed to stop bus on %s. Status: 0x%08x\n", core->hw_core.description, mali_hw_core_register_read(&core->hw_core, MALI200_REG_ADDR_MGMT_STATUS)));
+               if (mali_gp_reset_fail < 65533)
+                       mali_gp_reset_fail++;
                return _MALI_OSK_ERR_FAULT;
        }
        return _MALI_OSK_ERR_OK;
old mode 100644 (file)
new mode 100755 (executable)
index d2cef16..41185d0
@@ -9,6 +9,7 @@
 #ifndef MALI_PLATFORM_H_
 #define MALI_PLATFORM_H_
 
-
+extern u32 mali_gp_reset_fail;
+extern u32 mali_core_timeout;
 
 #endif /* MALI_PLATFORM_H_ */
index 05c18d95a7873fe8c0bdf20b7ebe22764732039b..61fc795bd4789aa5d75572a3464b326519ccdbb6 100755 (executable)
 #include "common/mali_osk_profiling.h"
 
 int mali_pm_statue = 0;
+u32 mali_gp_reset_fail = 0;
+module_param(mali_gp_reset_fail, int, S_IRUSR | S_IWUSR | S_IWGRP | S_IRGRP | S_IROTH); /* rw-rw-r-- */
+MODULE_PARM_DESC(mali_gp_reset_fail, "times of failed to reset GP");
+u32 mali_core_timeout = 0;
+module_param(mali_core_timeout, int, S_IRUSR | S_IWUSR | S_IWGRP | S_IRGRP | S_IROTH); /* rw-rw-r-- */
+MODULE_PARM_DESC(mali_core_timeout, "times of failed to reset GP");
 
 static struct mali_gpu_device_data mali_gpu_data =
 {
@@ -60,6 +66,8 @@ int mali_pdev_pre_init(struct platform_device* ptr_plt_dev)
 
 void mali_pdev_post_init(struct platform_device* pdev)
 {
+       mali_gp_reset_fail = 0;
+       mali_core_timeout = 0;
 #ifdef CONFIG_PM_RUNTIME
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
        pm_runtime_set_autosuspend_delay(&(pdev->dev), 1000);