ARM: OMAP2+: AM33XX: Update the hardreset API
authorVaibhav Bedia <vaibhav.bedia@ti.com>
Tue, 29 Jan 2013 11:15:06 +0000 (16:45 +0530)
committerPaul Walmsley <paul@pwsan.com>
Fri, 8 Feb 2013 14:25:28 +0000 (07:25 -0700)
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-omap2/prm33xx.c
arch/arm/mach-omap2/prm33xx.h

index 4653efb87a2721ea20a9fe06a30a6c204d6d2282..6549439d8d5fdaf19cf0d8d91bea9db66fcb576c 100644 (file)
@@ -3041,11 +3041,8 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
                                     struct omap_hwmod_rst_info *ohri)
 {
-       if (ohri->st_shift)
-               pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
-                      oh->name, ohri->name);
-
        return am33xx_prm_deassert_hardreset(ohri->rst_shift,
+                               ohri->st_shift,
                                oh->clkdm->pwrdm.ptr->prcm_offs,
                                oh->prcm.omap4.rstctrl_offs,
                                oh->prcm.omap4.rstst_offs);
index 1ac73883f8913c5894aff5f5267222c9f35343ee..44c0d7216aa72e1f5f578e0c7e4d8da1ada8871a 100644 (file)
@@ -110,11 +110,11 @@ int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs)
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
+int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
                u16 rstctrl_offs, u16 rstst_offs)
 {
        int c;
-       u32 mask = 1 << shift;
+       u32 mask = 1 << st_shift;
 
        /* Check the current status to avoid  de-asserting the line twice */
        if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0)
@@ -122,11 +122,14 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
 
        /* Clear the reset status by writing 1 to the status bit */
        am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs);
+
        /* de-assert the reset control line */
+       mask = 1 << shift;
+
        am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
-       /* wait the status to be set */
 
-       omap_test_timeout(am33xx_prm_is_hardreset_asserted(shift, inst,
+       /* wait the status to be set */
+       omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, inst,
                                                           rstst_offs),
                          MAX_MODULE_HARDRESET_WAIT, c);
 
index 1c40373b0234932cae9a2ddb9cce93587cb5ff01..9b9918dfb119967e91c3c1ee791bb48e63219b41 100644 (file)
@@ -125,7 +125,7 @@ extern void am33xx_prm_global_warm_sw_reset(void);
 extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
                u16 rstctrl_offs);
 extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
-extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
+extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
                u16 rstctrl_offs, u16 rstst_offs);
 #endif /* ASSEMBLER */
 #endif