#include <linux/kernel.h>
#include <linux/hdreg.h>
-struct ide_timing {
- u8 mode;
- short setup; /* t1 */
- short act8b; /* t2 for 8-bit io */
- short rec8b; /* t2i for 8-bit io */
- short cyc8b; /* t0 for 8-bit io */
- short active; /* t2 or tD */
- short recover; /* t2i or tK */
- short cycle; /* t0 */
- short udma; /* t2CYCTYP/2 */
-};
-
/*
* PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
* These were taken from ATA/ATAPI-6 standard, rev 0a, except
{ 0xff }
};
-#define IDE_TIMING_SETUP 0x01
-#define IDE_TIMING_ACT8B 0x02
-#define IDE_TIMING_REC8B 0x04
-#define IDE_TIMING_CYC8B 0x08
-#define IDE_TIMING_8BIT 0x0e
-#define IDE_TIMING_ACTIVE 0x10
-#define IDE_TIMING_RECOVER 0x20
-#define IDE_TIMING_CYCLE 0x40
-#define IDE_TIMING_UDMA 0x80
-#define IDE_TIMING_ALL 0xff
-
#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
u64 ide_get_lba_addr(struct ide_taskfile *, int);
u8 ide_dump_status(ide_drive_t *, const char *, u8);
+struct ide_timing {
+ u8 mode;
+ u8 setup; /* t1 */
+ u16 act8b; /* t2 for 8-bit io */
+ u16 rec8b; /* t2i for 8-bit io */
+ u16 cyc8b; /* t0 for 8-bit io */
+ u16 active; /* t2 or tD */
+ u16 recover; /* t2i or tK */
+ u16 cycle; /* t0 */
+ u16 udma; /* t2CYCTYP/2 */
+};
+
+enum {
+ IDE_TIMING_SETUP = (1 << 0),
+ IDE_TIMING_ACT8B = (1 << 1),
+ IDE_TIMING_REC8B = (1 << 2),
+ IDE_TIMING_CYC8B = (1 << 3),
+ IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
+ IDE_TIMING_CYC8B,
+ IDE_TIMING_ACTIVE = (1 << 4),
+ IDE_TIMING_RECOVER = (1 << 5),
+ IDE_TIMING_CYCLE = (1 << 6),
+ IDE_TIMING_UDMA = (1 << 7),
+ IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
+ IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
+ IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
+};
+
typedef struct ide_pio_timings_s {
int setup_time; /* Address setup (ns) minimum */
int active_time; /* Active pulse (ns) minimum */