M: Ao Xu <ao.xu@amlogic.com>
F: drivers/amlogic/drm/meson_debugfs.c
+AMLOGIC DRM
+M: Dezhi Kong <dezhi.kong@amlogic.com>
+F: arch/arm/boot/dts/amlogic/mesontl1_drm.dtsi
+F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
+F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301_2g_drm.dts
+F: arch/arm64/boot/dts/amlogic/mesontl1_drm.dtsi
+F: arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
+F: arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g_drm.dts
+F: drivers/amlogic/drm/meson_lcd.c
+F: drivers/amlogic/drm/meson_vpu.c
+F: drivers/amlogic/drm/meson_vpu_pipeline.c
+F: drivers/amlogic/drm/meson_vpu_pipeline_traverse.c
+F: include/dt-bindings/display/meson-drm-ids.h
+
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/meson_drm.dtsi
+ *
+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+#include <dt-bindings/display/meson-drm-ids.h>
+
+/ {
+ venc-cvbs {
+ status = "okay";
+ compatible = "amlogic, meson-tl1-cvbs";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ enc_cvbs_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ //venc_cvbs_in_vpu: endpoint@0 {
+ // reg = <0>;
+ // remote-endpoint = <&vpu_out_venc_cvbs>;
+ //};
+ };
+ };
+ };
+
+ drm_amhdmitx: drm-amhdmitx {
+ status = "disabled";
+ hdcp = "disabled";
+ compatible = "amlogic,drm-amhdmitx";
+ dev_name = "meson-amhdmitx";
+ interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi_in_vpu: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vpu_out_hdmi>;
+ };
+ };
+ };
+ };
+
+ drm_lcd: drm-lcd {
+ status = "disabled";
+ compatible = "amlogic,drm-lcd";
+ dev_name = "meson-lcd";
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd_in_vpu: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vpu_out_lcd>;
+ };
+ };
+ };
+ };
+
+ drm_vpu: drm-vpu@0xff900000 {
+ status = "disabled";
+ compatible = "amlogic, meson-tl1-vpu";
+ memory-region = <&logo_reserved>;
+ reg = <0xff900000 0x40000>,
+ <0xff63c000 0x2000>,
+ <0xff638000 0x2000>;
+ reg-names = "base", "hhi", "dmc";
+ interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "viu-vsync", "viu2-vsync";
+ clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc";
+ dma-coherent;
+ vpu_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vpu_out_hdmi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmi_in_vpu>;
+ };
+ vpu_out_lcd: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&lcd_in_vpu>;
+ };
+ };
+ };
+
+ drm_subsystem: drm-subsystem {
+ status = "okay";
+ compatible = "amlogic,drm-subsystem";
+ ports = <&vpu_out>;
+
+ vpu_topology: vpu_topology {
+ vpu_blocks {
+ osd1_block: block@0 {
+ id = /bits/ 8 <OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <0>;
+ block_name = "osd1_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc_osd1_block>;
+ };
+ osd2_block: block@1 {
+ id = /bits/ 8 <OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <0>;
+ block_name = "osd2_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc_osd2_block>;
+ };
+ afbc_osd1_block: block@3 {
+ id = /bits/ 8 <AFBC_OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc_osd1_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd1_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &osd_blend_block>;
+ };
+ afbc_osd2_block: block@4 {
+ id = /bits/ 8 <AFBC_OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc_osd2_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd2_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler_osd2_block>;
+ };
+ scaler_osd1_block: block@6 {
+ id = /bits/ 8 <SCALER_OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler_osd1_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd1_hdr_dolby_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &vpp_postblend_block>;
+ };
+ scaler_osd2_block: block@7 {
+ id = /bits/ 8 <SCALER_OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler_osd2_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &afbc_osd2_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <2 &osd_blend_block>;
+ };
+ osd_blend_block: block@9 {
+ id = /bits/ 8 <OSD_BLEND_BLOCK>;
+ block_name = "osd_blend_block";
+ type = /bits/ 8 <3>;
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &afbc_osd1_block>,
+ <0 &scaler_osd2_block>;
+ num_out_links = /bits/ 8 <0x2>;
+ out_links = <0 &osd1_hdr_dolby_block>,
+ <1 &vpp_postblend_block>;
+ };
+ osd1_hdr_dolby_block: block@10 {
+ id = /bits/ 8 <OSD1_HDR_BLOCK>;
+ block_name = "osd1_hdr_dolby_block";
+ type = /bits/ 8 <4>;
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd_blend_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler_osd1_block>;
+ };
+ vpp_postblend_block: block@12 {
+ id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
+ block_name = "vpp_postblend_block";
+ type = /bits/ 8 <6>;
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &scaler_osd1_block>,
+ <1 &osd_blend_block>;
+ num_out_links = <0x0>;
+ };
+ };
+ };
+
+ vpu_hw_para: vpu_hw_para@0 {
+ osd_ver = /bits/ 8 <0x2>;
+ afbc_type = /bits/ 8 <0x2>;
+ has_deband = /bits/ 8 <0x1>;
+ has_lut = /bits/ 8 <0x1>;
+ has_rdma = /bits/ 8 <0x1>;
+ osd_fifo_len = /bits/ 8 <64>;
+ vpp_fifo_len = /bits/ 32 <0xfff>;
+ };
+ };
+};
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
+ *
+ * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontl1.dtsi"
+#include "mesontl1_drm.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+#include "mesontl1_x301-panel.dtsi"
+
+/ {
+ model = "Amlogic TL1 T962X2 X301";
+ amlogic-dt-id = "tl1_t962x2_x301-1g";
+ compatible = "amlogic, tl1_t962x2_x301";
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ tsensor0 = &p_tsensor;
+ tsensor1 = &d_tsensor;
+ tsensor2 = &s_tsensor;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c_AO;
+ spi0 = &spicc0;
+ spi1 = &spicc1;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x40000>;
+ };
+
+ secmon_reserved: linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x3f800000 0x800000>;
+ };
+
+ lcd_tcon_reserved:linux,lcd_tcon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x3ec00000 0xc00000>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0xd000000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ alloc-ranges = <0x30000000 0x10000000>;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x2000000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x00000000 0x30000000>;
+ };
+
+ /* vdin0 CMA pool */
+ //vdin0_cma_reserved:linux,vdin0_cma {
+ // compatible = "shared-dma-pool";
+ // reusable;
+ /* 3840x2160x4x4 ~=128 M */
+ // size = <0xc400000>;
+ // alignment = <0x400000>;
+ //};
+
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /*keystone need 4 buffers,each has 1920*1080*3
+ *for keystone, change to 0x1800000(24M)
+ */
+ size = <0x1400000>;/*20M*/
+ alignment = <0x400000>;
+ alloc-ranges = <0x30000000 0x10000000>;
+ };
+
+ /*demod_reserved:linux,demod {
+ * compatible = "amlogic, demod-mem";
+ * size = <0x800000>; //8M //100m 0x6400000
+ * alloc-ranges = <0x0 0x30000000>;
+ * //multi-use;
+ * //no-map;
+ *};
+ */
+
+ demod_cma_reserved:linux,demod_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 8M */
+ size = <0x0800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x30000000 0x10000000>;
+ };
+
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x02800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x00000000 0x30000000>;
+ };
+
+ /* for hdmi rx emp use */
+ hdmirx_emp_cma_reserved:linux,emp_cma {
+ compatible = "shared-dma-pool";
+ /*linux,phandle = <5>;*/
+ reusable;
+ /* 4M for emp to ddr */
+ /* 32M for tmds to ddr */
+ size = <0x400000>;
+ alignment = <0x400000>;
+ /* alloc-ranges = <0x400000 0x2000000>; */
+ alloc-ranges = <0x00000000 0x30000000>;
+ };
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "amlogic, ppmgr_memory";
+ size = <0x0>;
+ };
+
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x0>;
+ linux,contiguous-region;
+ };
+ }; /* end of reserved-memory */
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ status = "okay";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite",
+ "vpu_mux";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "disabled";
+ clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>,
+ <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc0",
+ "vpu_clkc";
+ };
+
+ dummy_lcd {
+ compatible = "amlogic, dummy_lcd";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCP
+ &clkc CLKID_VCLK2_VENCP0
+ &clkc CLKID_VCLK2_VENCP1>;
+ clock-names = "encp_top_gate",
+ "encp_int_gate0",
+ "encp_int_gate1";
+ };
+
+ /* Audio Related start */
+ pdm_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+
+ dummy_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+
+ tl1_codec:codec {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, tl1_acodec";
+ status = "okay";
+ reg = <0xff632000 0x1c>;
+ tdmout_index = <0>;
+ tdmin_index = <0>;
+ dat1_ch_sel = <1>;
+ };
+
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-tl1";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+
+ //pinctrl-names="dtvdemod_agc";
+ //pinctrl-0=<&dtvdemod_agc>;
+
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ reg = <0xff650000 0x4000 /*dtv demod base*/
+ 0xff63c000 0x2000 /*hiu reg base*/
+ 0xff800000 0x1000 /*io_aobus_base*/
+ 0xffd01000 0x1000 /*reset*/
+ >;
+
+ dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
+ spectrum = <1>;
+ cma_flag = <1>;
+ cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ };
+
+ auge_sound {
+ compatible = "amlogic, tl1-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
+
+ aml-audio-card,dai-link@0 {
+ format = "i2s";
+ mclk-fs = <256>;
+ continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdma>;
+ frame-master = <&tdma>;
+ /* slave mode */
+ /*
+ * bitclock-master = <&tdmacodec>;
+ * frame-master = <&tdmacodec>;
+ */
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s";
+ tdmacpu: cpu {
+ sound-dai = <&tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmacodec: codec {
+ //sound-dai = <&dummy_codec>;
+ prefix-names = "AMP";
+ sound-dai = <&ad82584f &tl1_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmb>;
+ frame-master = <&tdmb>;
+ /* slave mode */
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pcm";
+ cpu {
+ sound-dai = <&tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ /*
+ * dai-tdm-slot-tx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-rx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-num = <8>;
+ */
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmc>;
+ frame-master = <&tdmc>;
+ /* slave mode */
+ //bitclock-master = <&tdmccodec>;
+ //frame-master = <&tdmccodec>;
+ /* suffix-name, sync with android audio hal used for */
+ //suffix-name = "alsaPORT-tdm";
+ cpu {
+ sound-dai = <&tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmccodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pdm";
+ cpu {
+ sound-dai = <&pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ continuous-clock;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&spdifa>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&spdifb>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@6 {
+ mclk-fs = <256>;
+ suffix-name = "alsaPORT-tv";
+ cpu {
+ sound-dai = <&extn>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@7 {
+ mclk-fs = <256>;
+ continuous-clock;
+ suffix-name = "alsaPORT-loopback";
+ cpu {
+ sound-dai = <&loopbacka>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ /* Audio Related end */
+
+ dvb {
+ compatible = "amlogic, dvb";
+ status = "okay";
+ fe0_mode = "internal";
+ fe0_tuner = <&tuner>;
+
+ /*"parallel","serial","disable"*/
+ ts2 = "parallel";
+ ts2_control = <0>;
+ ts2_invert = <0>;
+ interrupts = <0 23 1
+ 0 5 1
+ 0 53 1
+ 0 19 1
+ 0 25 1
+ 0 17 1>;
+ interrupt-names = "demux0_irq",
+ "demux1_irq",
+ "demux2_irq",
+ "dvr0_irq",
+ "dvr1_irq",
+ "dvr2_irq";
+ clocks = <&clkc CLKID_DEMUX
+ &clkc CLKID_ASYNC_FIFO
+ &clkc CLKID_AHB_ARB0
+/* &clkc CLKID_DOS_PARSER>;*/
+ &clkc CLKID_U_PARSER>;
+ clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, tl1_tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ interrupts = <0 12 1>,
+ <0 13 1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm-tl1";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enabel ;0:disable*/
+ wb_en = <1>;/*1:enabel ;0:disable*/
+ cm_en = <1>;/*1:enabel ;0:disable*/
+ wb_sel = <1>;/*1:mtx ;0:gainoff*/
+ vlock_en = <1>;/*1:enable;0:disable*/
+ vlock_mode = <0x4>;
+ /* vlock work mode:
+ *bit0:auto ENC
+ *bit1:auto PLL
+ *bit2:manual PLL
+ *bit3:manual ENC
+ *bit4:manual soft ENC
+ *bit5:manual MIX PLL ENC
+ */
+ vlock_pll_m_limit = <1>;
+ vlock_line_limit = <3>;
+ };
+
+ vdin@0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0x101>;
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <200>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ * bit8:use 8bit at 4k_50/60hz_10bit
+ * bit9:use 10bit at 4k_50/60hz_10bit
+ */
+ tv_bit_mode = <0x215>;
+ /* afbce_bit_mode: (amlogic frame buff compression encoder)
+ * bit0 -- enable afbce
+ * bit1 -- enable afbce compression-lossy
+ * bit4 -- afbce for 4k
+ * bit5 -- afbce for 1080p
+ * bit6 -- afbce for 720p
+ * bit7 -- afbce for smaller resolution
+ */
+ afbce_bit_mode = <0x11>;
+ };
+
+ vdin@1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0>;
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <1>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <0x15>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-tl1";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0xff654000 0x2000>;/*tvafe reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
+ cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */
+ /* auto_adj_en:
+ * bit0 -- auto cdto
+ * bit1 -- auto hs
+ * bit2 -- auto vs
+ * bit3 -- auto de
+ * bit4 -- auto 3dcomb
+ * bit5 -- auto pga
+ */
+ auto_adj_en = <0x3e>;
+ /* val: default=0, 0x1, 0xf1, 0xe1, 0x11 for special tuner
+ * force_flag: force setting to std mode, default=0
+ */
+ nostd_vs_th = <0 0>; /* val, force_flag */
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ status = "okay";
+ interrupts = <0 83 1>;
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-tl1";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+ /* clk path */
+ /* 0:vid_pll vid2_clk */
+ /* 1:gp0_pll vid2_clk */
+ /* 2:vid_pll vid1_clk */
+ /* 3:gp0_pll vid1_clk */
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* tl1 */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ performance_sarft = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x0
+ 0x1b05 0x9
+ 0x1c59 0xfc48
+ 0xffff 0x0>; /* ending flag */
+ performance_revB_telecom = <0x1bf0 0x9
+ 0x1b56 0x546
+ 0x1b12 0x8080
+ 0x1b05 0x9
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power","up","down","enter","left","right","home";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
+ io-channel-names = "key-chan-2", "key-chan-3";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+ SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+ key_code = <116 103 108 28 105 106 102>;
+ key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40 40 40 40 40>;
+};
+
+ unifykey {
+ compatible = "amlogic, unifykey";
+ status = "okay";
+
+ unifykey-num = <21>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+ unifykey-index-13 = <&keysn_13>;
+ unifykey-index-14 = <&keysn_14>;
+ unifykey-index-15 = <&keysn_15>;
+ unifykey-index-16 = <&keysn_16>;
+ unifykey-index-17 = <&keysn_17>;
+ unifykey-index-18 = <&keysn_18>;
+ unifykey-index-19 = <&keysn_19>;
+ unifykey-index-20 = <&keysn_20>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "hdcp22_rx_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "hdcp22_rx_fw";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "hdcp14_rx";
+ key-device = "normal";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_18:key_18{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_19:key_19{
+ key-name = "lcd_tcon";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_20:key_20{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_tl1";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ memory-region = <&hdmirx_emp_cma_reserved>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux>;
+ repeat = <0>;
+ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+ <&clkc CLKID_HDMIRX_CFG_COMP>,
+ <&clkc CLKID_HDMIRX_ACR_COMP>,
+ <&clkc CLKID_HDMIRX_METER_COMP>,
+ <&clkc CLKID_HDMIRX_AXI_COMP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV7>,
+ <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ // <&clkc CLK_AUD_PLL2FS>,
+ // <&clkc CLK_AUD_PLL4FS>,
+ // <&clkc CLK_AUD_OUT>;
+ clock-names = "hdmirx_modet_clk",
+ "hdmirx_cfg_clk",
+ "hdmirx_acr_ref_clk",
+ "cts_hdmirx_meter_clk",
+ "cts_hdmi_axi_clk",
+ "xtal",
+ "fclk_div5",
+ "fclk_div7",
+ "hdcp_rx22_skp",
+ "hdcp_rx22_esm";
+ // "hdmirx_aud_pll2fs",
+ // "hdmirx_aud_pll4f",
+ // "clk_aud_out";
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ hpd_low_cec_off = <1>;
+ /* bit4: enable feature, bit3~0: port number */
+ disable_port = <0x0>;
+ /* MAP_ADDR_MODULE_CBUS */
+ /* MAP_ADDR_MODULE_HIU */
+ /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+ /* MAP_ADDR_MODULE_SEC_AHB */
+ /* MAP_ADDR_MODULE_SEC_AHB2 */
+ /* MAP_ADDR_MODULE_APB4 */
+ /* MAP_ADDR_MODULE_TOP */
+ reg = < 0x0 0x0
+ 0xff63C000 0x2000
+ 0xffe0d000 0x2000
+ 0x0 0x0
+ 0x0 0x0
+ 0x0 0x0
+ 0xff610000 0xa000>;
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-tl1";
+ /*device_name = "aocec";*/
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "TL1"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ port_num = <3>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1
+ 0 199 1>;
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&aoceca_mux>;
+ pinctrl-1=<&aocecb_mux>;
+ pinctrl-2=<&aoceca_mux>;
+ reg = <0xFF80023c 0x4
+ 0xFF800000 0x400>;
+ reg-names = "ao_exit","ao";
+ };
+
+ p_tsensor: p_tsensor@ff634800 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xff634800 0x50>,
+ <0xff800268 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 35 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@ff634c00 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xff634c00 0x50>,
+ <0xff800230 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 36 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ s_tsensor: s_tsensor@ff635000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xff635000 0x50>,
+ <0xff80026c 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 38 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };/*meson cooling devices end*/
+
+ thermal-zones {
+ pll_thermal: pll_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 11>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ sar_thermal: sar_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&s_tsensor 2>;
+ trips {
+ sswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ scontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ shot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ scritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ }; /*thermal zone end*/
+
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <749000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <749000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <749000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <769000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <789000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <799000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1404000000>;
+ opp-microvolt = <799000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <819000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <829000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <869000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <919000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <969000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ status = "okay";
+ };
+
+ tuner: tuner {
+ compatible = "amlogic, tuner";
+ status = "okay";
+ tuner_cur = <0>; /* default use tuner */
+ tuner_num = <1>; /* tuner number, multi tuner support */
+ tuner_name_0 = "mxl661_tuner";
+ tuner_i2c_adap_0 = <&i2c0>;
+ tuner_i2c_addr_0 = <0x60>;
+ tuner_xtal_0 = <1>; /* 0: 16MHz, 1: 24MHz */
+ tuner_xtal_mode_0 = <3>;
+ /* NO_SHARE_XTAL(0)
+ * SLAVE_XTAL_SHARE(3)
+ */
+ tuner_xtal_cap_0 = <25>; /* when tuner_xtal_mode = 3, set 25 */
+ };
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ tuner = <&tuner>;
+ btsc_sap_mode = <1>;
+ /* pinctrl-names="atvdemod_agc_pins"; */
+ /* pinctrl-0=<&atvdemod_agc_pins>; */
+ reg = <0xff656000 0x2000 /* demod reg */
+ 0xff63c000 0x2000 /* hiu reg */
+ 0xff634000 0x2000 /* periphs reg */
+ 0xff64a000 0x2000>; /* audio reg */
+ reg_23cf = <0x88188832>;
+ /*default:0x88188832;r840 on haier:0x48188832*/
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ dhd_static_buf; //dhd_static_buf support
+ power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_b_pins1>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ab MESON_PWM_1 30541 0>;
+ duty-cycle = <15270>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ab MESON_PWM_3 30500 0>;
+ duty-cycle = <15250>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_b: sdio@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-tl1";
+ reg = <0xffe05000 0x800>;
+ interrupts = <0 190 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE", /**ptm debug */
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+
+/* sd_emmc_b: sd@ffe05000 {
+ * status = "okay";
+ * compatible = "amlogic, meson-mmc-tl1";
+ * reg = <0xffe05000 0x800>;
+ * interrupts = <0 190 1>;
+ *
+ * pinctrl-names = "sd_all_pins",
+ * "sd_clk_cmd_pins",
+ * "sd_1bit_pins";
+ * pinctrl-0 = <&sd_all_pins>;
+ * pinctrl-1 = <&sd_clk_cmd_pins>;
+ * pinctrl-2 = <&sd_1bit_pins>;
+ *
+ * clocks = <&clkc CLKID_SD_EMMC_B>,
+ * <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ * <&clkc CLKID_FCLK_DIV2>,
+ * <&clkc CLKID_FCLK_DIV5>,
+ * <&xtal>;
+ * clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ * bus-width = <4>;
+ * cap-sd-highspeed;
+ * cap-mmc-highspeed;
+ * max-frequency = <100000000>;
+ * disable-wp;
+ * sd {
+ * pinname = "sd";
+ * ocr_avail = <0x200080>;
+ * caps = "MMC_CAP_4_BIT_DATA",
+ * "MMC_CAP_MMC_HIGHSPEED",
+ * "MMC_CAP_SD_HIGHSPEED";
+ * f_min = <400000>;
+ * f_max = <200000000>;
+ * max_req_size = <0x20000>;
+ * no_sduart = <1>;
+ * gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ * jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ * gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ * card_type = <5>;
+ * };
+ * };
+ */
+
+}; /* end of / */
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+ tdma:tdm@0 {
+ compatible = "amlogic, tl1-snd-tdma";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0>;
+ dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+ dai-tdm-clk-sel = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0
+ &clkc CLKID_MPLL1
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "mclk", "clk_srcpll",
+ "samesource_srcpll", "samesource_clk";
+
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
+ pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
+
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ */
+ samesource_sel = <3>;
+
+ /* In for ACODEC_ADC */
+ acodec_adc = <1>;
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ /*enable default mclk(12.288M), before extern codec start*/
+ start_clk_enable = <1>;
+
+ /*tdm clk tuning enable*/
+ clk_tuning_enable = <1>;
+ status = "okay";
+
+ /* !!!For --TV platform-- ONLY */
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Spdif_samesource_Channel_Mask = "i2s_2/3";
+ };
+ };
+
+ tdmb:tdm@1 {
+ compatible = "amlogic, tl1-snd-tdmb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmc:tdm@2 {
+ compatible = "amlogic, tl1-snd-tdmc";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmlb:tdm@3 {
+ compatible = "amlogic, tl1-snd-tdmlb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ /*
+ * select tdmin_lb src;
+ * AXG
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA
+ * 4: PAD_TDMINB
+ * 5: PAD_TDMINC
+ *
+ * G12A/G12B
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*, oe pin
+ * 7: PAD_TDMINB_D*, oe pin
+ *
+ * TL1
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*
+ * 7: PAD_TDMINB_D*
+ * 8: PAD_TDMINC_D*
+ * 9: HDMIRX_I2S
+ * 10: ACODEC_ADC
+ */
+ lb-src-sel = <1>;
+
+ status = "disabled";
+ };
+
+ spdifa:spdif@0 {
+ compatible = "amlogic, tl1-snd-spdif-a";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL1
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+ interrupts =
+ <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_spdifin";
+
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_a>;
+ pinctrl-1 = <&spdifout_a_mute>;
+
+ /*
+ * whether do asrc for pcm and resample a or b
+ * if raw data, asrc is disabled automatically
+ * 0: "Disable",
+ * 1: "Enable:32K",
+ * 2: "Enable:44K",
+ * 3: "Enable:48K",
+ * 4: "Enable:88K",
+ * 5: "Enable:96K",
+ * 6: "Enable:176K",
+ * 7: "Enable:192K",
+ */
+ asrc_id = <0>;
+ auto_asrc = <3>;
+
+ /*spdif clk tuning enable*/
+ clk_tuning_enable = <1>;
+ status = "okay";
+ };
+
+ spdifb:spdif@1 {
+ compatible = "amlogic, tl1-snd-spdif-b";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+ &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+
+ status = "okay";
+ };
+
+ pdm:pdm {
+ compatible = "amlogic, tl1-snd-pdm";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+
+ /* mode 0~4, defalut:1 */
+ filter_mode = <1>;
+
+ status = "okay";
+ };
+
+ extn:extn {
+ compatible = "amlogic, snd-extn";
+ #sound-dai-cells = <0>;
+
+ interrupts =
+ <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_frhdmirx";
+
+ status = "okay";
+ };
+
+ aed:effect {
+ compatible = "amlogic, snd-effect-v2";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_EQDRC>;
+ clock-names = "gate", "srcpll", "eqdrc";
+
+ /*
+ * 0:tdmout_a
+ * 1:tdmout_b
+ * 2:tdmout_c
+ * 3:spdifout
+ * 4:spdifout_b
+ */
+ eqdrc_module = <0>;
+ /* max 0xf, each bit for one lane, usually one lane */
+ lane_mask = <0x1>;
+ /* max 0xff, each bit for one channel */
+ channel_mask = <0xff>;
+
+ status = "okay";
+ };
+
+ asrca: resample@0 {
+ compatible = "amlogic, tl1-resample-a";
+ clocks = <&clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A
+ &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ * FRHDMIRX, 8
+ */
+ resample_module = <8>;
+
+ status = "okay";
+ };
+
+ asrcb: resample@1 {
+ compatible = "amlogic, tl1-resample-b";
+
+ clocks = <&clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_MCLK_F
+ &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ */
+ resample_module = <3>;
+
+ status = "disabled";
+ };
+
+ vad:vad {
+ compatible = "amlogic, snd-vad";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_VAD>;
+ clock-names = "gate", "pll", "clk";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+ /*
+ * Data src sel:
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ * 5: loopback_b;
+ * 6: tdmin_lb;
+ * 7: loopback_a;
+ */
+ src = <4>;
+
+ /*
+ * deal with hot word in user space or kernel space
+ * 0: in user space
+ * 1: in kernel space
+ */
+ level = <1>;
+
+ status = "okay";
+ };
+
+ loopbacka:loopback@0 {
+ compatible = "amlogic, tl1-loopbacka";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* calc mclk for datalb */
+ mclk-fs = <256>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <0>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "okay";
+ };
+
+ loopbackb:loopback@1 {
+ compatible = "amlogic, tl1-loopbackb";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* calc mclk for datain_lb */
+ mclk-fs = <256>;
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ /* audio pin mux */
+
+ tdma_mclk: tdma_mclk {
+ mux { /* GPIOZ_0 */
+ groups = "mclk0_z";
+ function = "mclk0";
+ };
+ };
+
+ tdmout_a: tdmout_a {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "tdma_sclk_z",
+ "tdma_fs_z",
+ "tdma_dout0_z";
+ function = "tdma_out";
+ bias-pull-down;
+ };
+ };
+
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ tdmin_a: tdmin_a {
+ mux { /* GPIOZ_9 */
+ groups = "tdma_din2_z";
+ function = "tdma_in";
+ };
+ };
+
+ tdmout_c: tdmout_c {
+ mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+ groups = "tdmc_sclk",
+ "tdmc_fs",
+ "tdmc_dout0";
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c: tdmin_c {
+ mux { /* GPIODV_10 */
+ groups = "tdmc_din1";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin_a: spdifin_a {
+ mux { /* GPIODV_5 */
+ groups = "spdif_in";
+ function = "spdif_in";
+ };
+ };
+
+ spdifout_a: spdifout_a {
+ mux { /* GPIODV_4 */
+ groups = "spdif_out_dv4";
+ function = "spdif_out";
+ };
+ };
+
+ spdifout_a_mute: spdifout_a_mute {
+ mux { /* GPIODV_4 */
+ groups = "GPIODV_4";
+ function = "gpio_periphs";
+ };
+ };
+
+ pdmin: pdmin {
+ mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
+ groups = "pdm_dclk_z",
+ "pdm_din0_z",
+ "pdm_din2_z4";
+ function = "pdm";
+ };
+ };
+
+ /*backlight*/
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_off_pins:bl_pwm_off_pin {
+ mux {
+ groups = "GPIOZ_5";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
+ mux {
+ groups = "GPIOZ_5",
+ "GPIOZ_6";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&audio_data{
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_z_pins>;
+ clock-frequency = <400000>;
+
+ tas5805: tas5805@36 {
+ compatible = "ti,tas5805";
+ #sound-dai-cells = <0>;
+ codec_name = "tas5805";
+ reg = <0x2d>;
+ status = "disable";
+ };
+
+ ad82584f: ad82584f@62 {
+ compatible = "ESMT, ad82584f";
+ #sound-dai-cells = <0>;
+ reg = <0x31>;
+ status = "okay";
+ reset_pin = <&gpio_ao GPIOAO_6 0>;
+ };
+
+};
+
+&sd_emmc_c {
+ status = "okay";
+ emmc {
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23",
+ "MMC_CAP_DRIVER_TYPE_D";
+ caps2 = "MMC_CAP2_HS200";
+ /*MMC_CAP2_HS400"*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+
+
+&spifc {
+ status = "disabled";
+ spi-nor@0 {
+ cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&slc_nand {
+ status = "disabled";
+ plat-names = "bootloader", "nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+};
+
+ðmac {
+ status = "okay";
+ pinctrl-names = "internal_eth_pins";
+ pinctrl-0 = <&internal_eth_pins>;
+ mc_val = <0x4be04>;
+
+ internal_phy=<1>;
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&usb2_phy_v2 {
+ status = "okay";
+ portnum = <3>;
+};
+
+&usb3_phy_v2 {
+ status = "okay";
+ portnum = <0>;
+ otg = <0>;
+};
+
+&dwc2_a {
+ status = "okay";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <1>;
+};
+
+&spicc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc0_pins_h>;
+ cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+ status = "disabled";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
+ logo_addr = "0x3f800000";
+ mem_alloc = <0>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&drm_vpu {
+ status = "okay";
+ logo_addr = "0x3f800000";
+ osd_ver = /bits/ 8 <OSD_V4>;
+};
+
+&drm_amhdmitx {
+ status = "disabled";
+ hdcp = "disabled";
+};
+
+&drm_lcd {
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c1_h_pins>;
+
+ lcd_extern_i2c0: lcd_extern_i2c@0 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_T5800Q";
+ reg = <0x1c>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c1: lcd_extern_i2c@1 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX6862";
+ reg = <0x20>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c2: lcd_extern_i2c@2 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX7911";
+ reg = <0x74>;
+ status = "okay";
+ };
+};
+
+&pwm_ab {
+ status = "okay";
+};
+
+&pwm_cd {
+ status = "okay";
+};
+
+&efuse {
+ status = "okay";
+};
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
+ *
+ * Copyright (C) 2018 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontl1.dtsi"
+#include "mesontl1_drm.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+#include "mesontl1_x301-panel.dtsi"
+
+/ {
+ model = "Amlogic TL1 T962X2 X301";
+ amlogic-dt-id = "tl1_t962x2_x301-2g";
+ compatible = "amlogic, tl1_t962x2_x301";
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ tsensor0 = &p_tsensor;
+ tsensor1 = &d_tsensor;
+ tsensor2 = &s_tsensor;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c_AO;
+ spi0 = &spicc0;
+ spi1 = &spicc1;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x80000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x40000>;
+ };
+
+ secmon_reserved: linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x7f800000 0x800000>;
+ };
+
+ lcd_tcon_reserved:linux,lcd_tcon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x7ec00000 0xc00000>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x13400000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ alloc-ranges = <0x30000000 0x50000000>;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x2000000>;
+ alignment = <0x400000>;
+ };
+
+ /* vdin0 CMA pool */
+ //vdin0_cma_reserved:linux,vdin0_cma {
+ // compatible = "shared-dma-pool";
+ // reusable;
+ /* 3840x2160x4x4 ~=128 M */
+ // size = <0xc400000>;
+ // alignment = <0x400000>;
+ //};
+
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /*keystone need 4 buffers,each has 1920*1080*3
+ *for keystone, change to 0x1800000(24M)
+ */
+ size = <0x1400000>;/*20M*/
+ alignment = <0x400000>;
+ };
+
+ /*demod_reserved:linux,demod {
+ * compatible = "amlogic, demod-mem";
+ * size = <0x800000>; //8M //100m 0x6400000
+ * alloc-ranges = <0x0 0x30000000>;
+ * //multi-use;
+ * //no-map;
+ *};
+ */
+
+ demod_cma_reserved:linux,demod_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 8M */
+ size = <0x0800000>;
+ alignment = <0x400000>;
+ };
+
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x02800000>;
+ alignment = <0x400000>;
+ };
+
+ /* for hdmi rx emp use */
+ hdmirx_emp_cma_reserved:linux,emp_cma {
+ compatible = "shared-dma-pool";
+ /*linux,phandle = <5>;*/
+ reusable;
+ /* 4M for emp to ddr */
+ /* 32M for tmds to ddr */
+ size = <0x400000>;
+ alignment = <0x400000>;
+ /* alloc-ranges = <0x400000 0x2000000>; */
+ };
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "amlogic, ppmgr_memory";
+ size = <0x0>;
+ };
+
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x0>;
+ linux,contiguous-region;
+ };
+ }; /* end of reserved-memory */
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ status = "okay";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite",
+ "vpu_mux";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "disabled";
+ clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>,
+ <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc0",
+ "vpu_clkc";
+ };
+
+ dummy_lcd {
+ compatible = "amlogic, dummy_lcd";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCP
+ &clkc CLKID_VCLK2_VENCP0
+ &clkc CLKID_VCLK2_VENCP1>;
+ clock-names = "encp_top_gate",
+ "encp_int_gate0",
+ "encp_int_gate1";
+ };
+
+ /* Audio Related start */
+ pdm_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+
+ dummy_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+
+ tl1_codec:codec {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, tl1_acodec";
+ status = "okay";
+ reg = <0xff632000 0x1c>;
+ tdmout_index = <0>;
+ tdmin_index = <0>;
+ dat1_ch_sel = <1>;
+ };
+
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-tl1";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+
+ //pinctrl-names="dtvdemod_agc";
+ //pinctrl-0=<&dtvdemod_agc>;
+
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ reg = <0xff650000 0x4000 /*dtv demod base*/
+ 0xff63c000 0x2000 /*hiu reg base*/
+ 0xff800000 0x1000 /*io_aobus_base*/
+ 0xffd01000 0x1000 /*reset*/
+ >;
+
+ dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
+ spectrum = <1>;
+ cma_flag = <1>;
+ cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ };
+
+ auge_sound {
+ compatible = "amlogic, tl1-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
+
+ aml-audio-card,dai-link@0 {
+ format = "i2s";
+ mclk-fs = <256>;
+ continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdma>;
+ frame-master = <&tdma>;
+ /* slave mode */
+ /*
+ * bitclock-master = <&tdmacodec>;
+ * frame-master = <&tdmacodec>;
+ */
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s";
+ tdmacpu: cpu {
+ sound-dai = <&tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmacodec: codec {
+ //sound-dai = <&dummy_codec>;
+ prefix-names = "AMP";
+ sound-dai = <&ad82584f &tl1_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmb>;
+ frame-master = <&tdmb>;
+ /* slave mode */
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pcm";
+ cpu {
+ sound-dai = <&tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ /*
+ * dai-tdm-slot-tx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-rx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-num = <8>;
+ */
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmc>;
+ frame-master = <&tdmc>;
+ /* slave mode */
+ //bitclock-master = <&tdmccodec>;
+ //frame-master = <&tdmccodec>;
+ /* suffix-name, sync with android audio hal used for */
+ //suffix-name = "alsaPORT-tdm";
+ cpu {
+ sound-dai = <&tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmccodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pdm";
+ cpu {
+ sound-dai = <&pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ continuous-clock;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&spdifa>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&spdifb>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@6 {
+ mclk-fs = <256>;
+ suffix-name = "alsaPORT-tv";
+ cpu {
+ sound-dai = <&extn>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@7 {
+ mclk-fs = <256>;
+ continuous-clock;
+ suffix-name = "alsaPORT-loopback";
+ cpu {
+ sound-dai = <&loopbacka>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ /* Audio Related end */
+
+ dvb {
+ compatible = "amlogic, dvb";
+ status = "okay";
+ fe0_mode = "internal";
+ fe0_tuner = <&tuner>;
+
+ /*"parallel","serial","disable"*/
+ ts2 = "parallel";
+ ts2_control = <0>;
+ ts2_invert = <0>;
+ interrupts = <0 23 1
+ 0 5 1
+ 0 53 1
+ 0 19 1
+ 0 25 1
+ 0 17 1>;
+ interrupt-names = "demux0_irq",
+ "demux1_irq",
+ "demux2_irq",
+ "dvr0_irq",
+ "dvr1_irq",
+ "dvr2_irq";
+ clocks = <&clkc CLKID_DEMUX
+ &clkc CLKID_ASYNC_FIFO
+ &clkc CLKID_AHB_ARB0
+/* &clkc CLKID_DOS_PARSER>;*/
+ &clkc CLKID_U_PARSER>;
+ clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, tl1_tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ interrupts = <0 12 1>,
+ <0 13 1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm-tl1";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enabel ;0:disable*/
+ wb_en = <1>;/*1:enabel ;0:disable*/
+ cm_en = <1>;/*1:enabel ;0:disable*/
+ wb_sel = <1>;/*1:mtx ;0:gainoff*/
+ vlock_en = <1>;/*1:enable;0:disable*/
+ vlock_mode = <0x4>;
+ /* vlock work mode:
+ *bit0:auto ENC
+ *bit1:auto PLL
+ *bit2:manual PLL
+ *bit3:manual ENC
+ *bit4:manual soft ENC
+ *bit5:manual MIX PLL ENC
+ */
+ vlock_pll_m_limit = <1>;
+ vlock_line_limit = <3>;
+ };
+
+ vdin@0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0x101>;
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <200>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ * bit8:use 8bit at 4k_50/60hz_10bit
+ * bit9:use 10bit at 4k_50/60hz_10bit
+ */
+ tv_bit_mode = <0x215>;
+ /* afbce_bit_mode: (amlogic frame buff compression encoder)
+ * bit0 -- enable afbce
+ * bit1 -- enable afbce compression-lossy
+ * bit4 -- afbce for 4k
+ * bit5 -- afbce for 1080p
+ * bit6 -- afbce for 720p
+ * bit7 -- afbce for smaller resolution
+ */
+ afbce_bit_mode = <0x11>;
+ };
+
+ vdin@1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0>;
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <1>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <0x15>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-tl1";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0xff654000 0x2000>;/*tvafe reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
+ cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */
+ /* auto_adj_en:
+ * bit0 -- auto cdto
+ * bit1 -- auto hs
+ * bit2 -- auto vs
+ * bit3 -- auto de
+ * bit4 -- auto 3dcomb
+ * bit5 -- auto pga
+ */
+ auto_adj_en = <0x3e>;
+ /* val: default=0, 0x1, 0xf1, 0xe1, 0x11 for special tuner
+ * force_flag: force setting to std mode, default=0
+ */
+ nostd_vs_th = <0 0>; /* val, force_flag */
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ status = "okay";
+ interrupts = <0 83 1>;
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-tl1";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+ /* clk path */
+ /* 0:vid_pll vid2_clk */
+ /* 1:gp0_pll vid2_clk */
+ /* 2:vid_pll vid1_clk */
+ /* 3:gp0_pll vid1_clk */
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* tl1 */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ performance_sarft = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x0
+ 0x1b05 0x9
+ 0x1c59 0xfc48
+ 0xffff 0x0>; /* ending flag */
+ performance_revB_telecom = <0x1bf0 0x9
+ 0x1b56 0x546
+ 0x1b12 0x8080
+ 0x1b05 0x9
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power","up","down","enter","left","right","home";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
+ io-channel-names = "key-chan-2", "key-chan-3";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+ SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+ key_code = <116 103 108 28 105 106 102>;
+ key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40 40 40 40 40>;
+};
+
+ unifykey {
+ compatible = "amlogic, unifykey";
+ status = "okay";
+
+ unifykey-num = <21>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+ unifykey-index-13 = <&keysn_13>;
+ unifykey-index-14 = <&keysn_14>;
+ unifykey-index-15 = <&keysn_15>;
+ unifykey-index-16 = <&keysn_16>;
+ unifykey-index-17 = <&keysn_17>;
+ unifykey-index-18 = <&keysn_18>;
+ unifykey-index-19 = <&keysn_19>;
+ unifykey-index-20 = <&keysn_20>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "hdcp22_rx_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "hdcp22_rx_fw";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "hdcp14_rx";
+ key-device = "normal";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_18:key_18{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_19:key_19{
+ key-name = "lcd_tcon";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_20:key_20{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_tl1";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ memory-region = <&hdmirx_emp_cma_reserved>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux>;
+ repeat = <0>;
+ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+ <&clkc CLKID_HDMIRX_CFG_COMP>,
+ <&clkc CLKID_HDMIRX_ACR_COMP>,
+ <&clkc CLKID_HDMIRX_METER_COMP>,
+ <&clkc CLKID_HDMIRX_AXI_COMP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV7>,
+ <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ // <&clkc CLK_AUD_PLL2FS>,
+ // <&clkc CLK_AUD_PLL4FS>,
+ // <&clkc CLK_AUD_OUT>;
+ clock-names = "hdmirx_modet_clk",
+ "hdmirx_cfg_clk",
+ "hdmirx_acr_ref_clk",
+ "cts_hdmirx_meter_clk",
+ "cts_hdmi_axi_clk",
+ "xtal",
+ "fclk_div5",
+ "fclk_div7",
+ "hdcp_rx22_skp",
+ "hdcp_rx22_esm";
+ // "hdmirx_aud_pll2fs",
+ // "hdmirx_aud_pll4f",
+ // "clk_aud_out";
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ hpd_low_cec_off = <1>;
+ /* bit4: enable feature, bit3~0: port number */
+ disable_port = <0x0>;
+ /* MAP_ADDR_MODULE_CBUS */
+ /* MAP_ADDR_MODULE_HIU */
+ /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+ /* MAP_ADDR_MODULE_SEC_AHB */
+ /* MAP_ADDR_MODULE_SEC_AHB2 */
+ /* MAP_ADDR_MODULE_APB4 */
+ /* MAP_ADDR_MODULE_TOP */
+ reg = < 0x0 0x0
+ 0xff63C000 0x2000
+ 0xffe0d000 0x2000
+ 0x0 0x0
+ 0x0 0x0
+ 0x0 0x0
+ 0xff610000 0xa000>;
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-tl1";
+ /*device_name = "aocec";*/
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "TL1"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ port_num = <3>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1
+ 0 199 1>;
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&aoceca_mux>;
+ pinctrl-1=<&aocecb_mux>;
+ pinctrl-2=<&aoceca_mux>;
+ reg = <0xFF80023c 0x4
+ 0xFF800000 0x400>;
+ reg-names = "ao_exit","ao";
+ };
+
+ p_tsensor: p_tsensor@ff634800 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xff634800 0x50>,
+ <0xff800268 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 35 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@ff634c00 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xff634c00 0x50>,
+ <0xff800230 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 36 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ s_tsensor: s_tsensor@ff635000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0xff635000 0x50>,
+ <0xff80026c 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 38 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };/*meson cooling devices end*/
+
+ thermal-zones {
+ pll_thermal: pll_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 11>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ sar_thermal: sar_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&s_tsensor 2>;
+ trips {
+ sswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ scontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ shot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ scritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ }; /*thermal zone end*/
+
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <749000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <749000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <749000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <769000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <789000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <799000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1404000000>;
+ opp-microvolt = <799000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <819000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <829000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <869000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <919000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <969000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ status = "okay";
+ };
+
+ tuner: tuner {
+ compatible = "amlogic, tuner";
+ status = "okay";
+ tuner_cur = <0>; /* default use tuner */
+ tuner_num = <1>; /* tuner number, multi tuner support */
+ tuner_name_0 = "mxl661_tuner";
+ tuner_i2c_adap_0 = <&i2c0>;
+ tuner_i2c_addr_0 = <0x60>;
+ tuner_xtal_0 = <1>; /* 0: 16MHz, 1: 24MHz */
+ tuner_xtal_mode_0 = <3>;
+ /* NO_SHARE_XTAL(0)
+ * SLAVE_XTAL_SHARE(3)
+ */
+ tuner_xtal_cap_0 = <25>; /* when tuner_xtal_mode = 3, set 25 */
+ };
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ tuner = <&tuner>;
+ btsc_sap_mode = <1>;
+ /* pinctrl-names="atvdemod_agc_pins"; */
+ /* pinctrl-0=<&atvdemod_agc_pins>; */
+ reg = <0xff656000 0x2000 /* demod reg */
+ 0xff63c000 0x2000 /* hiu reg */
+ 0xff634000 0x2000 /* periphs reg */
+ 0xff64a000 0x2000>; /* audio reg */
+ reg_23cf = <0x88188832>;
+ /*default:0x88188832;r840 on haier:0x48188832*/
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ dhd_static_buf; //dhd_static_buf support
+ power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_b_pins1>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ab MESON_PWM_1 30541 0>;
+ duty-cycle = <15270>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ab MESON_PWM_3 30500 0>;
+ duty-cycle = <15250>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_b: sdio@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-tl1";
+ reg = <0xffe05000 0x800>;
+ interrupts = <0 190 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE", /**ptm debug */
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+
+/* sd_emmc_b: sd@ffe05000 {
+ * status = "okay";
+ * compatible = "amlogic, meson-mmc-tl1";
+ * reg = <0xffe05000 0x800>;
+ * interrupts = <0 190 1>;
+ *
+ * pinctrl-names = "sd_all_pins",
+ * "sd_clk_cmd_pins",
+ * "sd_1bit_pins";
+ * pinctrl-0 = <&sd_all_pins>;
+ * pinctrl-1 = <&sd_clk_cmd_pins>;
+ * pinctrl-2 = <&sd_1bit_pins>;
+ *
+ * clocks = <&clkc CLKID_SD_EMMC_B>,
+ * <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ * <&clkc CLKID_FCLK_DIV2>,
+ * <&clkc CLKID_FCLK_DIV5>,
+ * <&xtal>;
+ * clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ * bus-width = <4>;
+ * cap-sd-highspeed;
+ * cap-mmc-highspeed;
+ * max-frequency = <100000000>;
+ * disable-wp;
+ * sd {
+ * pinname = "sd";
+ * ocr_avail = <0x200080>;
+ * caps = "MMC_CAP_4_BIT_DATA",
+ * "MMC_CAP_MMC_HIGHSPEED",
+ * "MMC_CAP_SD_HIGHSPEED";
+ * f_min = <400000>;
+ * f_max = <200000000>;
+ * max_req_size = <0x20000>;
+ * no_sduart = <1>;
+ * gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ * jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ * gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ * card_type = <5>;
+ * };
+ * };
+ */
+
+}; /* end of / */
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+ tdma:tdm@0 {
+ compatible = "amlogic, tl1-snd-tdma";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0>;
+ dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+ dai-tdm-clk-sel = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0
+ &clkc CLKID_MPLL1
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "mclk", "clk_srcpll",
+ "samesource_srcpll", "samesource_clk";
+
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
+ pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
+
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ */
+ samesource_sel = <3>;
+
+ /* In for ACODEC_ADC */
+ acodec_adc = <1>;
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ /*enable default mclk(12.288M), before extern codec start*/
+ start_clk_enable = <1>;
+
+ /*tdm clk tuning enable*/
+ clk_tuning_enable = <1>;
+
+ status = "okay";
+
+ /* !!!For --TV platform-- ONLY */
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Spdif_samesource_Channel_Mask = "i2s_2/3";
+ };
+ };
+
+ tdmb:tdm@1 {
+ compatible = "amlogic, tl1-snd-tdmb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmc:tdm@2 {
+ compatible = "amlogic, tl1-snd-tdmc";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmlb:tdm@3 {
+ compatible = "amlogic, tl1-snd-tdmlb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ /*
+ * select tdmin_lb src;
+ * AXG
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA
+ * 4: PAD_TDMINB
+ * 5: PAD_TDMINC
+ *
+ * G12A/G12B
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*, oe pin
+ * 7: PAD_TDMINB_D*, oe pin
+ *
+ * TL1
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*
+ * 7: PAD_TDMINB_D*
+ * 8: PAD_TDMINC_D*
+ * 9: HDMIRX_I2S
+ * 10: ACODEC_ADC
+ */
+ lb-src-sel = <1>;
+
+ status = "disabled";
+ };
+
+ spdifa:spdif@0 {
+ compatible = "amlogic, tl1-snd-spdif-a";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL1
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+ interrupts =
+ <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_spdifin";
+
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_a>;
+ pinctrl-1 = <&spdifout_a_mute>;
+
+ /*
+ * whether do asrc for pcm and resample a or b
+ * if raw data, asrc is disabled automatically
+ * 0: "Disable",
+ * 1: "Enable:32K",
+ * 2: "Enable:44K",
+ * 3: "Enable:48K",
+ * 4: "Enable:88K",
+ * 5: "Enable:96K",
+ * 6: "Enable:176K",
+ * 7: "Enable:192K",
+ */
+ asrc_id = <0>;
+ auto_asrc = <3>;
+
+ /*spdif clk tuning enable*/
+ clk_tuning_enable = <1>;
+
+ status = "okay";
+ };
+
+ spdifb:spdif@1 {
+ compatible = "amlogic, tl1-snd-spdif-b";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+ &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+
+ status = "okay";
+ };
+
+ pdm:pdm {
+ compatible = "amlogic, tl1-snd-pdm";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+
+ /* mode 0~4, defalut:1 */
+ filter_mode = <1>;
+
+ status = "okay";
+ };
+
+ extn:extn {
+ compatible = "amlogic, snd-extn";
+ #sound-dai-cells = <0>;
+
+ interrupts =
+ <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_frhdmirx";
+
+ status = "okay";
+ };
+
+ aed:effect {
+ compatible = "amlogic, snd-effect-v2";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_EQDRC>;
+ clock-names = "gate", "srcpll", "eqdrc";
+
+ /*
+ * 0:tdmout_a
+ * 1:tdmout_b
+ * 2:tdmout_c
+ * 3:spdifout
+ * 4:spdifout_b
+ */
+ eqdrc_module = <0>;
+ /* max 0xf, each bit for one lane, usually one lane */
+ lane_mask = <0x1>;
+ /* max 0xff, each bit for one channel */
+ channel_mask = <0xff>;
+
+ status = "okay";
+ };
+
+ asrca: resample@0 {
+ compatible = "amlogic, tl1-resample-a";
+ clocks = <&clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A
+ &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ * FRHDMIRX, 8
+ */
+ resample_module = <8>;
+
+ status = "okay";
+ };
+
+ asrcb: resample@1 {
+ compatible = "amlogic, tl1-resample-b";
+
+ clocks = <&clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_MCLK_F
+ &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ */
+ resample_module = <3>;
+
+ status = "disabled";
+ };
+
+ vad:vad {
+ compatible = "amlogic, snd-vad";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_VAD>;
+ clock-names = "gate", "pll", "clk";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+ /*
+ * Data src sel:
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ * 5: loopback_b;
+ * 6: tdmin_lb;
+ * 7: loopback_a;
+ */
+ src = <4>;
+
+ /*
+ * deal with hot word in user space or kernel space
+ * 0: in user space
+ * 1: in kernel space
+ */
+ level = <1>;
+
+ status = "okay";
+ };
+
+ loopbacka:loopback@0 {
+ compatible = "amlogic, tl1-loopbacka";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* calc mclk for datalb */
+ mclk-fs = <256>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <0>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "okay";
+ };
+
+ loopbackb:loopback@1 {
+ compatible = "amlogic, tl1-loopbackb";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* calc mclk for datain_lb */
+ mclk-fs = <256>;
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ /* audio pin mux */
+
+ tdma_mclk: tdma_mclk {
+ mux { /* GPIOZ_0 */
+ groups = "mclk0_z";
+ function = "mclk0";
+ };
+ };
+
+ tdmout_a: tdmout_a {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "tdma_sclk_z",
+ "tdma_fs_z",
+ "tdma_dout0_z";
+ function = "tdma_out";
+ bias-pull-down;
+ };
+ };
+
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ tdmin_a: tdmin_a {
+ mux { /* GPIOZ_9 */
+ groups = "tdma_din2_z";
+ function = "tdma_in";
+ };
+ };
+
+ tdmout_c: tdmout_c {
+ mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+ groups = "tdmc_sclk",
+ "tdmc_fs",
+ "tdmc_dout0";
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c: tdmin_c {
+ mux { /* GPIODV_10 */
+ groups = "tdmc_din1";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin_a: spdifin_a {
+ mux { /* GPIODV_5 */
+ groups = "spdif_in";
+ function = "spdif_in";
+ };
+ };
+
+ spdifout_a: spdifout_a {
+ mux { /* GPIODV_4 */
+ groups = "spdif_out_dv4";
+ function = "spdif_out";
+ };
+ };
+
+ spdifout_a_mute: spdifout_a_mute {
+ mux { /* GPIODV_4 */
+ groups = "GPIODV_4";
+ function = "gpio_periphs";
+ };
+ };
+
+ pdmin: pdmin {
+ mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
+ groups = "pdm_dclk_z",
+ "pdm_din0_z",
+ "pdm_din2_z4";
+ function = "pdm";
+ };
+ };
+
+ /*backlight*/
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_off_pins:bl_pwm_off_pin {
+ mux {
+ groups = "GPIOZ_5";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
+ mux {
+ groups = "GPIOZ_5",
+ "GPIOZ_6";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&audio_data{
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_z_pins>;
+ clock-frequency = <400000>;
+
+ tas5805: tas5805@36 {
+ compatible = "ti,tas5805";
+ #sound-dai-cells = <0>;
+ codec_name = "tas5805";
+ reg = <0x2d>;
+ status = "disable";
+ };
+
+ ad82584f: ad82584f@62 {
+ compatible = "ESMT, ad82584f";
+ #sound-dai-cells = <0>;
+ reg = <0x31>;
+ status = "okay";
+ reset_pin = <&gpio_ao GPIOAO_6 0>;
+ };
+
+};
+
+&sd_emmc_c {
+ status = "okay";
+ emmc {
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23",
+ "MMC_CAP_DRIVER_TYPE_D";
+ caps2 = "MMC_CAP2_HS200";
+ /*MMC_CAP2_HS400"*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+
+
+&spifc {
+ status = "disabled";
+ spi-nor@0 {
+ cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&slc_nand {
+ status = "disabled";
+ plat-names = "bootloader", "nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+};
+
+ðmac {
+ status = "okay";
+ pinctrl-names = "internal_eth_pins";
+ pinctrl-0 = <&internal_eth_pins>;
+ mc_val = <0x4be04>;
+
+ internal_phy=<1>;
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&usb2_phy_v2 {
+ status = "okay";
+ portnum = <3>;
+};
+
+&usb3_phy_v2 {
+ status = "okay";
+ portnum = <0>;
+ otg = <0>;
+};
+
+&dwc2_a {
+ status = "okay";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <1>;
+};
+
+&spicc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc0_pins_h>;
+ cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+ status = "disabled";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
+ logo_addr = "0x7f800000";
+ mem_alloc = <0>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&drm_vpu {
+ status = "okay";
+ logo_addr = "0x3f800000";
+ osd_ver = /bits/ 8 <OSD_V4>;
+};
+
+&drm_amhdmitx {
+ status = "disabled";
+ hdcp = "disabled";
+};
+
+&drm_lcd {
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c1_h_pins>;
+
+ lcd_extern_i2c0: lcd_extern_i2c@0 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_T5800Q";
+ reg = <0x1c>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c1: lcd_extern_i2c@1 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX6862";
+ reg = <0x20>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c2: lcd_extern_i2c@2 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX7911";
+ reg = <0x74>;
+ status = "okay";
+ };
+};
+
+&pwm_ab {
+ status = "okay";
+};
+
+&pwm_cd {
+ status = "okay";
+};
+
+&efuse {
+ status = "okay";
+};
--- /dev/null
+/*
+ * arch/arm64/boot/dts/amlogic/mesontl1_drm.dtsi
+ *
+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+#include <dt-bindings/display/meson-drm-ids.h>
+
+/ {
+ venc-cvbs {
+ status = "okay";
+ compatible = "amlogic, meson-tl1-cvbs";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ enc_cvbs_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ //venc_cvbs_in_vpu: endpoint@0 {
+ // reg = <0>;
+ // remote-endpoint = <&vpu_out_venc_cvbs>;
+ //};
+ };
+ };
+ };
+
+ drm_amhdmitx: drm-amhdmitx {
+ status = "disabled";
+ hdcp = "disabled";
+ compatible = "amlogic,drm-amhdmitx";
+ dev_name = "meson-amhdmitx";
+ interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi_in_vpu: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vpu_out_hdmi>;
+ };
+ };
+ };
+ };
+
+ drm_lcd: drm-lcd {
+ status = "disabled";
+ compatible = "amlogic,drm-lcd";
+ dev_name = "meson-lcd";
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd_in_vpu: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vpu_out_lcd>;
+ };
+ };
+ };
+ };
+
+ drm_vpu: drm-vpu@0xff900000 {
+ status = "disabled";
+ compatible = "amlogic, meson-tl1-vpu";
+ memory-region = <&logo_reserved>;
+ reg = <0x0 0xff900000 0x0 0x40000>,
+ <0x0 0xff63c000 0x0 0x2000>,
+ <0x0 0xff638000 0x0 0x2000>;
+ reg-names = "base", "hhi", "dmc";
+ interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "viu-vsync", "viu2-vsync";
+ clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc";
+ dma-coherent;
+ vpu_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vpu_out_hdmi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmi_in_vpu>;
+ };
+ vpu_out_lcd: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&lcd_in_vpu>;
+ };
+ };
+ };
+
+ drm_subsystem: drm-subsystem {
+ status = "okay";
+ compatible = "amlogic,drm-subsystem";
+ ports = <&vpu_out>;
+
+ vpu_topology: vpu_topology {
+ vpu_blocks {
+ osd1_block: block@0 {
+ id = /bits/ 8 <OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <0>;
+ block_name = "osd1_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc_osd1_block>;
+ };
+ osd2_block: block@1 {
+ id = /bits/ 8 <OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <0>;
+ block_name = "osd2_block";
+ num_in_links = /bits/ 8 <0x0>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &afbc_osd2_block>;
+ };
+ afbc_osd1_block: block@3 {
+ id = /bits/ 8 <AFBC_OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc_osd1_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd1_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &osd_blend_block>;
+ };
+ afbc_osd2_block: block@4 {
+ id = /bits/ 8 <AFBC_OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <1>;
+ block_name = "afbc_osd2_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd2_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler_osd2_block>;
+ };
+ scaler_osd1_block: block@6 {
+ id = /bits/ 8 <SCALER_OSD1_BLOCK>;
+ index = /bits/ 8 <0>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler_osd1_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd1_hdr_dolby_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &vpp_postblend_block>;
+ };
+ scaler_osd2_block: block@7 {
+ id = /bits/ 8 <SCALER_OSD2_BLOCK>;
+ index = /bits/ 8 <1>;
+ type = /bits/ 8 <2>;
+ block_name = "scaler_osd2_block";
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &afbc_osd2_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <2 &osd_blend_block>;
+ };
+ osd_blend_block: block@9 {
+ id = /bits/ 8 <OSD_BLEND_BLOCK>;
+ block_name = "osd_blend_block";
+ type = /bits/ 8 <3>;
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &afbc_osd1_block>,
+ <0 &scaler_osd2_block>;
+ num_out_links = /bits/ 8 <0x2>;
+ out_links = <0 &osd1_hdr_dolby_block>,
+ <1 &vpp_postblend_block>;
+ };
+ osd1_hdr_dolby_block: block@10 {
+ id = /bits/ 8 <OSD1_HDR_BLOCK>;
+ block_name = "osd1_hdr_dolby_block";
+ type = /bits/ 8 <4>;
+ num_in_links = /bits/ 8 <0x1>;
+ in_links = <0 &osd_blend_block>;
+ num_out_links = /bits/ 8 <0x1>;
+ out_links = <0 &scaler_osd1_block>;
+ };
+ vpp_postblend_block: block@12 {
+ id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
+ block_name = "vpp_postblend_block";
+ type = /bits/ 8 <6>;
+ num_in_links = /bits/ 8 <0x2>;
+ in_links = <0 &scaler_osd1_block>,
+ <1 &osd_blend_block>;
+ num_out_links = <0x0>;
+ };
+ };
+ };
+
+ vpu_hw_para: vpu_hw_para@0 {
+ osd_ver = /bits/ 8 <0x2>;
+ afbc_type = /bits/ 8 <0x2>;
+ has_deband = /bits/ 8 <0x1>;
+ has_lut = /bits/ 8 <0x1>;
+ has_rdma = /bits/ 8 <0x1>;
+ osd_fifo_len = /bits/ 8 <64>;
+ vpp_fifo_len = /bits/ 32 <0xfff>;
+ };
+ };
+};
--- /dev/null
+/*
+ * arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontl1.dtsi"
+#include "mesontl1_drm.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+#include "mesontl1_x301-panel.dtsi"
+
+/ {
+ model = "Amlogic TL1 T962X2 X301";
+ amlogic-dt-id = "tl1_t962x2_x301-1g";
+ compatible = "amlogic, tl1_t962x2_x301";
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ tsensor0 = &p_tsensor;
+ tsensor1 = &d_tsensor;
+ tsensor2 = &s_tsensor;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c_AO;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x0 0x07400000 0x0 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x40000>;
+ };
+
+ secmon_reserved: linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+ };
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x3f800000 0x0 0x800000>;
+ };
+
+ lcd_tcon_reserved:linux,lcd_tcon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x0>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x3ec00000 0x0 0xc00000>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x0 0xd000000>;
+ alignment = <0x0 0x400000>;
+ linux,contiguous-region;
+ alloc-ranges = <0x0 0x30000000 0x0 0x10000000>;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0 0x0>;
+ alignment = <0x0 0x100000>;
+ //no-map;
+ };
+
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x2000000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x00000000 0x0 0x30000000>;
+ };
+
+ /* vdin0 CMA pool */
+ //vdin0_cma_reserved:linux,vdin0_cma {
+ // compatible = "shared-dma-pool";
+ // reusable;
+ /* 3840x2160x4x4 ~=128 M */
+ // size = <0x0 0xc400000>;
+ // alignment = <0x0 0x400000>;
+ //};
+
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /*keystone need 4 buffers,each has 1920*1080*3
+ *for keystone, change to 0x1800000(24M)
+ */
+ size = <0x0 0x1400000>;/*20M*/
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x30000000 0x0 0x10000000>;
+ };
+
+ /*demod_reserved:linux,demod {
+ * compatible = "amlogic, demod-mem";
+ * size = <0x0 0x800000>; //8M //100m 0x6400000
+ * alloc-ranges = <0x0 0x0 0x0 0x30000000>;
+ * //multi-use;
+ * //no-map;
+ *};
+ */
+
+ demod_cma_reserved:linux,demod_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 8M */
+ size = <0x0 0x0800000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x30000000 0x0 0x10000000>;
+ };
+
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x0 0x02800000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x00000000 0x0 0x30000000>;
+ };
+
+ /* for hdmi rx emp use */
+ hdmirx_emp_cma_reserved:linux,emp_cma {
+ compatible = "shared-dma-pool";
+ /*linux,phandle = <5>;*/
+ reusable;
+ /* 4M for emp to ddr */
+ /* 32M for tmds to ddr */
+ size = <0x0 0x2000000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x00000000 0x0 0x30000000>;
+ };
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "amlogic, ppmgr_memory";
+ size = <0x0 0x0>;
+ };
+
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x0>;
+ alignment = <0x0 0x0>;
+ linux,contiguous-region;
+ };
+ }; /* end of reserved-memory */
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ status = "okay";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite",
+ "vpu_mux";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "disabled";
+ clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>,
+ <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc0",
+ "vpu_clkc";
+ };
+
+ dummy_lcd {
+ compatible = "amlogic, dummy_lcd";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCP
+ &clkc CLKID_VCLK2_VENCP0
+ &clkc CLKID_VCLK2_VENCP1>;
+ clock-names = "encp_top_gate",
+ "encp_int_gate0",
+ "encp_int_gate1";
+ };
+
+ /* Audio Related start */
+ pdm_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+
+ dummy_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+
+ tl1_codec:codec {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, tl1_acodec";
+ status = "okay";
+ reg = <0x0 0xff632000 0x0 0x1c>;
+ tdmout_index = <0>;
+ tdmin_index = <0>;
+ dat1_ch_sel = <1>;
+ };
+
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-tl1";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+
+ //pinctrl-names="dtvdemod_agc";
+ //pinctrl-0=<&dtvdemod_agc>;
+
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ reg = <0x0 0xff650000 0x0 0x4000 /*dtv demod base*/
+ 0x0 0xff63c000 0x0 0x2000 /*hiu reg base*/
+ 0x0 0xff800000 0x0 0x1000 /*io_aobus_base*/
+ 0x0 0xffd01000 0x0 0x1000 /*reset*/
+ >;
+
+ dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
+ spectrum = <1>;
+ cma_flag = <1>;
+ cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ };
+
+ auge_sound {
+ compatible = "amlogic, tl1-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
+
+ aml-audio-card,dai-link@0 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdma>;
+ frame-master = <&tdma>;
+ /* slave mode */
+ /*
+ * bitclock-master = <&tdmacodec>;
+ * frame-master = <&tdmacodec>;
+ */
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s";
+ tdmacpu: cpu {
+ sound-dai = <&tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmacodec: codec {
+ //sound-dai = <&dummy_codec>;
+ prefix-names = "AMP";
+ sound-dai = <&ad82584f &tl1_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmb>;
+ frame-master = <&tdmb>;
+ /* slave mode */
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pcm";
+ cpu {
+ sound-dai = <&tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ /*
+ * dai-tdm-slot-tx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-rx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-num = <8>;
+ */
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmc>;
+ frame-master = <&tdmc>;
+ /* slave mode */
+ //bitclock-master = <&tdmccodec>;
+ //frame-master = <&tdmccodec>;
+ /* suffix-name, sync with android audio hal used for */
+ //suffix-name = "alsaPORT-tdm";
+ cpu {
+ sound-dai = <&tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmccodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pdm";
+ cpu {
+ sound-dai = <&pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&spdifa>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&spdifb>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@6 {
+ mclk-fs = <256>;
+ suffix-name = "alsaPORT-tv";
+ cpu {
+ sound-dai = <&extn>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@7 {
+ mclk-fs = <256>;
+ continuous-clock;
+ suffix-name = "alsaPORT-loopback";
+ cpu {
+ sound-dai = <&loopbacka>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ /* Audio Related end */
+
+ dvb {
+ compatible = "amlogic, dvb";
+ status = "okay";
+ fe0_mode = "internal";
+ fe0_tuner = <&tuner>;
+
+ /*"parallel","serial","disable"*/
+ ts2 = "parallel";
+ ts2_control = <0>;
+ ts2_invert = <0>;
+ interrupts = <0 23 1
+ 0 5 1
+ 0 53 1
+ 0 19 1
+ 0 25 1
+ 0 17 1>;
+ interrupt-names = "demux0_irq",
+ "demux1_irq",
+ "demux2_irq",
+ "dvr0_irq",
+ "dvr1_irq",
+ "dvr2_irq";
+ clocks = <&clkc CLKID_DEMUX
+ &clkc CLKID_ASYNC_FIFO
+ &clkc CLKID_AHB_ARB0
+/* &clkc CLKID_DOS_PARSER>;*/
+ &clkc CLKID_U_PARSER>;
+ clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, tl1_tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ interrupts = <0 12 1>,
+ <0 13 1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enabel ;0:disable*/
+ wb_en = <1>;/*1:enabel ;0:disable*/
+ cm_en = <1>;/*1:enabel ;0:disable*/
+ wb_sel = <0>;/*1:mtx ;0:gainoff*/
+ vlock_en = <1>;/*1:enable;0:disable*/
+ vlock_mode = <0x4>;
+ /* vlock work mode:
+ *bit0:auto ENC
+ *bit1:auto PLL
+ *bit2:manual PLL
+ *bit3:manual ENC
+ *bit4:manual soft ENC
+ *bit5:manual MIX PLL ENC
+ */
+ vlock_pll_m_limit = <1>;
+ vlock_line_limit = <2>;
+ };
+
+ vdin@0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0x101>;
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <200>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ * bit8:use 8bit at 4k_50/60hz_10bit
+ * bit9:use 10bit at 4k_50/60hz_10bit
+ */
+ tv_bit_mode = <0x215>;
+ /* afbce_bit_mode: (amlogic frame buff compression encoder)
+ * bit0 -- enable afbce
+ * bit1 -- enable afbce compression-lossy
+ * bit4 -- afbce for 4k
+ * bit5 -- afbce for 1080p
+ * bit6 -- afbce for 720p
+ * bit7 -- afbce for smaller resolution
+ */
+ afbce_bit_mode = <0x11>;
+ };
+
+ vdin@1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0>;
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <1>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <0x15>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-tl1";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0x0 0xff654000 0x0 0x2000>;/*tvafe reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
+ cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */
+ /* auto_adj_en:
+ * bit0 -- auto cdto
+ * bit1 -- auto hs
+ * bit2 -- auto vs
+ * bit3 -- auto de
+ * bit4 -- auto 3dcomb
+ * bit5 -- auto pga
+ */
+ auto_adj_en = <0x3e>;
+ /* val: default=0, 0x1, 0xf1, 0xe1, 0x11 for special tuner
+ * force_flag: force setting to std mode, default=0
+ */
+ nostd_vs_th = <0 0>; /* val, force_flag */
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ status = "okay";
+ interrupts = <0 83 1>;
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-tl1";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+ /* clk path */
+ /* 0:vid_pll vid2_clk */
+ /* 1:gp0_pll vid2_clk */
+ /* 2:vid_pll vid1_clk */
+ /* 3:gp0_pll vid1_clk */
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* tl1 */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ performance_sarft = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x0
+ 0x1b05 0x9
+ 0x1c59 0xfc48
+ 0xffff 0x0>; /* ending flag */
+ performance_revB_telecom = <0x1bf0 0x9
+ 0x1b56 0x546
+ 0x1b12 0x8080
+ 0x1b05 0x9
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power","up","down","enter","left","right","home";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
+ io-channel-names = "key-chan-2", "key-chan-3";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+ SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+ key_code = <116 103 108 28 105 106 102>;
+ key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40 40 40 40 40>;
+};
+
+ unifykey {
+ compatible = "amlogic, unifykey";
+ status = "okay";
+
+ unifykey-num = <21>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+ unifykey-index-13 = <&keysn_13>;
+ unifykey-index-14 = <&keysn_14>;
+ unifykey-index-15 = <&keysn_15>;
+ unifykey-index-16 = <&keysn_16>;
+ unifykey-index-17 = <&keysn_17>;
+ unifykey-index-18 = <&keysn_18>;
+ unifykey-index-19 = <&keysn_19>;
+ unifykey-index-20 = <&keysn_20>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "hdcp22_rx_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "hdcp22_rx_fw";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "hdcp14_rx";
+ key-device = "normal";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_18:key_18{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_19:key_19{
+ key-name = "lcd_tcon";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_20:key_20{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_tl1";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ memory-region = <&hdmirx_emp_cma_reserved>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux>;
+ repeat = <0>;
+ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+ <&clkc CLKID_HDMIRX_CFG_COMP>,
+ <&clkc CLKID_HDMIRX_ACR_COMP>,
+ <&clkc CLKID_HDMIRX_METER_COMP>,
+ <&clkc CLKID_HDMIRX_AXI_COMP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV7>,
+ <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ // <&clkc CLK_AUD_PLL2FS>,
+ // <&clkc CLK_AUD_PLL4FS>,
+ // <&clkc CLK_AUD_OUT>;
+ clock-names = "hdmirx_modet_clk",
+ "hdmirx_cfg_clk",
+ "hdmirx_acr_ref_clk",
+ "cts_hdmirx_meter_clk",
+ "cts_hdmi_axi_clk",
+ "xtal",
+ "fclk_div5",
+ "fclk_div7",
+ "hdcp_rx22_skp",
+ "hdcp_rx22_esm";
+ // "hdmirx_aud_pll2fs",
+ // "hdmirx_aud_pll4f",
+ // "clk_aud_out";
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ hpd_low_cec_off = <1>;
+ /* bit4: enable feature, bit3~0: port number */
+ disable_port = <0x0>;
+ /* MAP_ADDR_MODULE_CBUS */
+ /* MAP_ADDR_MODULE_HIU */
+ /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+ /* MAP_ADDR_MODULE_SEC_AHB */
+ /* MAP_ADDR_MODULE_SEC_AHB2 */
+ /* MAP_ADDR_MODULE_APB4 */
+ /* MAP_ADDR_MODULE_TOP */
+ reg = < 0x0 0x0 0x0 0x0
+ 0x0 0xff63C000 0x0 0x2000
+ 0x0 0xffe0d000 0x0 0x2000
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0xff610000 0x0 0xa000>;
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-tl1";
+ /*device_name = "aocec";*/
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "TL1"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ port_num = <3>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1
+ 0 199 1>;
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&aoceca_mux>;
+ pinctrl-1=<&aocecb_mux>;
+ pinctrl-2=<&aoceca_mux>;
+ reg = <0x0 0xFF80023c 0x0 0x4
+ 0x0 0xFF800000 0x0 0x400>;
+ reg-names = "ao_exit","ao";
+ };
+
+ p_tsensor: p_tsensor@ff634800 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xff634800 0x0 0x50>,
+ <0x0 0xff800268 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 35 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@ff634c00 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xff634c00 0x0 0x50>,
+ <0x0 0xff800230 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 36 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ s_tsensor: s_tsensor@ff635000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xff635000 0x0 0x50>,
+ <0x0 0xff80026c 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 38 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };/*meson cooling devices end*/
+
+ thermal-zones {
+ pll_thermal: pll_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 11>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ sar_thermal: sar_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&s_tsensor 2>;
+ trips {
+ sswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ scontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ shot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ scritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ }; /*thermal zone end*/
+
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <749000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <749000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <749000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <769000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <789000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <799000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1404000000>;
+ opp-microvolt = <799000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <819000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <829000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <869000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <919000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <969000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ status = "okay";
+ };
+
+ tuner: tuner {
+ compatible = "amlogic, tuner";
+ status = "okay";
+ tuner_cur = <0>; /* default use tuner */
+ tuner_num = <1>; /* tuner number, multi tuner support */
+ tuner_name_0 = "mxl661_tuner";
+ tuner_i2c_adap_0 = <&i2c0>;
+ tuner_i2c_addr_0 = <0x60>;
+ tuner_xtal_0 = <1>; /* 0: 16MHz, 1: 24MHz */
+ tuner_xtal_mode_0 = <3>;
+ /* NO_SHARE_XTAL(0)
+ * SLAVE_XTAL_SHARE(3)
+ */
+ tuner_xtal_cap_0 = <25>; /* when tuner_xtal_mode = 3, set 25 */
+ };
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ tuner = <&tuner>;
+ btsc_sap_mode = <1>;
+ /* pinctrl-names="atvdemod_agc_pins"; */
+ /* pinctrl-0=<&atvdemod_agc_pins>; */
+ reg = <0x0 0xff656000 0x0 0x2000 /* demod reg */
+ 0x0 0xff63c000 0x0 0x2000 /* hiu reg */
+ 0x0 0xff634000 0x0 0x2000 /* periphs reg */
+ 0x0 0xff64a000 0x0 0x2000>; /* audio reg */
+ reg_23cf = <0x88188832>;
+ /*default:0x88188832;r840 on haier:0x48188832*/
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ dhd_static_buf; //dhd_static_buf support
+ power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_b_pins1>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ab MESON_PWM_1 30541 0>;
+ duty-cycle = <15270>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ab MESON_PWM_3 30500 0>;
+ duty-cycle = <15250>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_b: sdio@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-tl1";
+ reg = <0x0 0xffe05000 0x0 0x800>;
+ interrupts = <0 190 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE", /**ptm debug */
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+/* sd_emmc_b: sd@ffe05000 {
+ * status = "okay";
+ * compatible = "amlogic, meson-mmc-tl1";
+ * reg = <0xffe05000 0x800>;
+ * interrupts = <0 190 1>;
+ *
+ * pinctrl-names = "sd_all_pins",
+ * "sd_clk_cmd_pins",
+ * "sd_1bit_pins";
+ * pinctrl-0 = <&sd_all_pins>;
+ * pinctrl-1 = <&sd_clk_cmd_pins>;
+ * pinctrl-2 = <&sd_1bit_pins>;
+ *
+ * clocks = <&clkc CLKID_SD_EMMC_B>,
+ * <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ * <&clkc CLKID_FCLK_DIV2>,
+ * <&clkc CLKID_FCLK_DIV5>,
+ * <&xtal>;
+ * clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ * bus-width = <4>;
+ * cap-sd-highspeed;
+ * cap-mmc-highspeed;
+ * max-frequency = <100000000>;
+ * disable-wp;
+ * sd {
+ * pinname = "sd";
+ * ocr_avail = <0x200080>;
+ * caps = "MMC_CAP_4_BIT_DATA",
+ * "MMC_CAP_MMC_HIGHSPEED",
+ * "MMC_CAP_SD_HIGHSPEED";
+ * f_min = <400000>;
+ * f_max = <200000000>;
+ * max_req_size = <0x20000>;
+ * no_sduart = <1>;
+ * gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ * jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ * gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ * card_type = <5>;
+ * };
+ * };
+ */
+
+}; /* end of / */
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+ tdma:tdm@0 {
+ compatible = "amlogic, tl1-snd-tdma";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0>;
+ dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+ dai-tdm-clk-sel = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0
+ &clkc CLKID_MPLL1
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "mclk", "clk_srcpll",
+ "samesource_srcpll", "samesource_clk";
+
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
+ pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
+
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ */
+ samesource_sel = <3>;
+
+ /* In for ACODEC_ADC */
+ acodec_adc = <1>;
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ /*enable default mclk(12.288M), before extern codec start*/
+ start_clk_enable = <1>;
+
+ /*tdm clk tuning enable*/
+ clk_tuning_enable = <1>;
+ status = "okay";
+
+ /* !!!For --TV platform-- ONLY */
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Spdif_samesource_Channel_Mask = "i2s_2/3";
+ };
+ };
+
+ tdmb:tdm@1 {
+ compatible = "amlogic, tl1-snd-tdmb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmc:tdm@2 {
+ compatible = "amlogic, tl1-snd-tdmc";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmlb:tdm@3 {
+ compatible = "amlogic, tl1-snd-tdmlb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ /*
+ * select tdmin_lb src;
+ * AXG
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA
+ * 4: PAD_TDMINB
+ * 5: PAD_TDMINC
+ *
+ * G12A/G12B
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*, oe pin
+ * 7: PAD_TDMINB_D*, oe pin
+ *
+ * TL1
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*
+ * 7: PAD_TDMINB_D*
+ * 8: PAD_TDMINC_D*
+ * 9: HDMIRX_I2S
+ * 10: ACODEC_ADC
+ */
+ lb-src-sel = <1>;
+
+ status = "disabled";
+ };
+
+ spdifa:spdif@0 {
+ compatible = "amlogic, tl1-snd-spdif-a";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL1
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+ interrupts =
+ <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_spdifin";
+
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_a>;
+ pinctrl-1 = <&spdifout_a_mute>;
+
+ /*
+ * whether do asrc for pcm and resample a or b
+ * if raw data, asrc is disabled automatically
+ * 0: "Disable",
+ * 1: "Enable:32K",
+ * 2: "Enable:44K",
+ * 3: "Enable:48K",
+ * 4: "Enable:88K",
+ * 5: "Enable:96K",
+ * 6: "Enable:176K",
+ * 7: "Enable:192K",
+ */
+ asrc_id = <0>;
+ auto_asrc = <3>;
+
+ /*spdif clk tuning enable*/
+ clk_tuning_enable = <1>;
+ status = "okay";
+ };
+
+ spdifb:spdif@1 {
+ compatible = "amlogic, tl1-snd-spdif-b";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+ &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+
+ status = "okay";
+ };
+
+ pdm:pdm {
+ compatible = "amlogic, tl1-snd-pdm";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+
+ /* mode 0~4, defalut:1 */
+ filter_mode = <1>;
+
+ status = "okay";
+ };
+
+ extn:extn {
+ compatible = "amlogic, snd-extn";
+ #sound-dai-cells = <0>;
+
+ interrupts =
+ <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_frhdmirx";
+
+ status = "okay";
+ };
+
+ aed:effect {
+ compatible = "amlogic, snd-effect-v2";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_EQDRC>;
+ clock-names = "gate", "srcpll", "eqdrc";
+
+ /*
+ * 0:tdmout_a
+ * 1:tdmout_b
+ * 2:tdmout_c
+ * 3:spdifout
+ * 4:spdifout_b
+ */
+ eqdrc_module = <0>;
+ /* max 0xf, each bit for one lane, usually one lane */
+ lane_mask = <0x1>;
+ /* max 0xff, each bit for one channel */
+ channel_mask = <0xff>;
+
+ status = "okay";
+ };
+
+ asrca: resample@0 {
+ compatible = "amlogic, tl1-resample-a";
+ clocks = <&clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A
+ &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ * FRHDMIRX, 8
+ */
+ resample_module = <8>;
+
+ status = "okay";
+ };
+
+ asrcb: resample@1 {
+ compatible = "amlogic, tl1-resample-b";
+
+ clocks = <&clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_MCLK_F
+ &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ */
+ resample_module = <3>;
+
+ status = "disabled";
+ };
+
+ vad:vad {
+ compatible = "amlogic, snd-vad";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_VAD>;
+ clock-names = "gate", "pll", "clk";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+ /*
+ * Data src sel:
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ * 5: loopback_b;
+ * 6: tdmin_lb;
+ * 7: loopback_a;
+ */
+ src = <4>;
+
+ /*
+ * deal with hot word in user space or kernel space
+ * 0: in user space
+ * 1: in kernel space
+ */
+ level = <1>;
+
+ status = "okay";
+ };
+
+ loopbacka:loopback@0 {
+ compatible = "amlogic, tl1-loopbacka";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* calc mclk for datalb */
+ mclk-fs = <256>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <0>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "okay";
+ };
+
+ loopbackb:loopback@1 {
+ compatible = "amlogic, tl1-loopbackb";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* calc mclk for datain_lb */
+ mclk-fs = <256>;
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ /* audio pin mux */
+
+ tdma_mclk: tdma_mclk {
+ mux { /* GPIOZ_0 */
+ groups = "mclk0_z";
+ function = "mclk0";
+ };
+ };
+
+ tdmout_a: tdmout_a {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "tdma_sclk_z",
+ "tdma_fs_z",
+ "tdma_dout0_z";
+ function = "tdma_out";
+ bias-pull-down;
+ };
+ };
+
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+ tdmin_a: tdmin_a {
+ mux { /* GPIOZ_9 */
+ groups = "tdma_din2_z";
+ function = "tdma_in";
+ };
+ };
+
+ tdmout_c: tdmout_c {
+ mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+ groups = "tdmc_sclk",
+ "tdmc_fs",
+ "tdmc_dout0";
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c: tdmin_c {
+ mux { /* GPIODV_10 */
+ groups = "tdmc_din1";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin_a: spdifin_a {
+ mux { /* GPIODV_5 */
+ groups = "spdif_in";
+ function = "spdif_in";
+ };
+ };
+
+ spdifout_a: spdifout_a {
+ mux { /* GPIODV_4 */
+ groups = "spdif_out_dv4";
+ function = "spdif_out";
+ };
+ };
+
+ spdifout_a_mute: spdifout_a_mute {
+ mux { /* GPIODV_4 */
+ groups = "GPIODV_4";
+ function = "gpio_periphs";
+ };
+ };
+
+ pdmin: pdmin {
+ mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
+ groups = "pdm_dclk_z",
+ "pdm_din0_z",
+ "pdm_din2_z4";
+ function = "pdm";
+ };
+ };
+
+ /*backlight*/
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_off_pins:bl_pwm_off_pin {
+ mux {
+ groups = "GPIOZ_5";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
+ mux {
+ groups = "GPIOZ_5",
+ "GPIOZ_6";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&audio_data{
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_z_pins>;
+ clock-frequency = <400000>;
+
+ tas5805: tas5805@36 {
+ compatible = "ti,tas5805";
+ #sound-dai-cells = <0>;
+ codec_name = "tas5805";
+ reg = <0x2d>;
+ status = "disable";
+ };
+
+ ad82584f: ad82584f@62 {
+ compatible = "ESMT, ad82584f";
+ #sound-dai-cells = <0>;
+ reg = <0x31>;
+ status = "okay";
+ reset_pin = <&gpio_ao GPIOAO_6 0>;
+ };
+
+};
+
+&sd_emmc_c {
+ status = "okay";
+ emmc {
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23",
+ "MMC_CAP_DRIVER_TYPE_D";
+ caps2 = "MMC_CAP2_HS200";
+ /*MMC_CAP2_HS400"*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+
+
+&spifc {
+ status = "disabled";
+ spi-nor@0 {
+ cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&slc_nand {
+ status = "disabled";
+ plat-names = "bootloader", "nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+};
+
+ðmac {
+ status = "okay";
+ pinctrl-names = "internal_eth_pins";
+ pinctrl-0 = <&internal_eth_pins>;
+ mc_val = <0x4be04>;
+
+ internal_phy=<1>;
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&usb2_phy_v2 {
+ status = "okay";
+ portnum = <3>;
+};
+
+&usb3_phy_v2 {
+ status = "okay";
+ portnum = <0>;
+ otg = <0>;
+};
+
+&dwc2_a {
+ status = "okay";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <1>;
+};
+
+&spicc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc0_pins_h>;
+ cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+ status = "disabled";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
+ logo_addr = "0x3f800000";
+ mem_alloc = <0>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&drm_vpu {
+ status = "okay";
+ logo_addr = "0x3f800000";
+ osd_ver = /bits/ 8 <OSD_V4>;
+};
+
+&drm_amhdmitx {
+ status = "disabled";
+ hdcp = "disabled";
+};
+
+&drm_lcd {
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c1_h_pins>;
+
+ lcd_extern_i2c0: lcd_extern_i2c@0 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_T5800Q";
+ reg = <0x1c>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c1: lcd_extern_i2c@1 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX6862";
+ reg = <0x20>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c2: lcd_extern_i2c@2 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX7911";
+ reg = <0x74>;
+ status = "okay";
+ };
+};
+
+&pwm_ab {
+ status = "okay";
+};
+
+&pwm_cd {
+ status = "okay";
+};
+
+&efuse {
+ status = "okay";
+};
--- /dev/null
+/*
+ * arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g_drm.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontl1.dtsi"
+#include "mesontl1_drm.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+#include "mesontl1_x301-panel.dtsi"
+
+/ {
+ model = "Amlogic TL1 T962X2 X301";
+ amlogic-dt-id = "tl1_t962x2_x301-2g";
+ compatible = "amlogic, tl1_t962x2_x301";
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ tsensor0 = &p_tsensor;
+ tsensor1 = &d_tsensor;
+ tsensor2 = &s_tsensor;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c_AO;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x0 0x07400000 0x0 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x40000>;
+ };
+
+ secmon_reserved: linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+ };
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
+ };
+
+ lcd_tcon_reserved:linux,lcd_tcon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x0>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x7ec00000 0x0 0xc00000>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x0 0x13400000>;
+ alignment = <0x0 0x400000>;
+ linux,contiguous-region;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0 0x0>;
+ alignment = <0x0 0x100000>;
+ //no-map;
+ };
+
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x2000000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ /* vdin0 CMA pool */
+ //vdin0_cma_reserved:linux,vdin0_cma {
+ // compatible = "shared-dma-pool";
+ // reusable;
+ /* 3840x2160x4x4 ~=128 M */
+ // size = <0x0 0xc400000>;
+ // alignment = <0x0 0x400000>;
+ //};
+
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /*keystone need 4 buffers,each has 1920*1080*3
+ *for keystone, change to 0x1800000(24M)
+ */
+ size = <0x0 0x1400000>;/*20M*/
+ alignment = <0x0 0x400000>;
+ };
+
+ /*demod_reserved:linux,demod {
+ * compatible = "amlogic, demod-mem";
+ * size = <0x0 0x800000>; //8M //100m 0x6400000
+ * alloc-ranges = <0x0 0x0 0x0 0x30000000>;
+ * //multi-use;
+ * //no-map;
+ *};
+ */
+
+ demod_cma_reserved:linux,demod_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 8M */
+ size = <0x0 0x0800000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x0 0x02800000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ /* for hdmi rx emp use */
+ hdmirx_emp_cma_reserved:linux,emp_cma {
+ compatible = "shared-dma-pool";
+ /*linux,phandle = <5>;*/
+ reusable;
+ /* 4M for emp to ddr */
+ /* 32M for tmds to ddr */
+ size = <0x0 0x2000000>;
+ alignment = <0x0 0x400000>;
+ };
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "amlogic, ppmgr_memory";
+ size = <0x0 0x0>;
+ };
+
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x0>;
+ alignment = <0x0 0x0>;
+ linux,contiguous-region;
+ };
+ }; /* end of reserved-memory */
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ status = "okay";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite",
+ "vpu_mux";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "disabled";
+ clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>,
+ <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc0",
+ "vpu_clkc";
+ };
+
+ dummy_lcd {
+ compatible = "amlogic, dummy_lcd";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCP
+ &clkc CLKID_VCLK2_VENCP0
+ &clkc CLKID_VCLK2_VENCP1>;
+ clock-names = "encp_top_gate",
+ "encp_int_gate0",
+ "encp_int_gate1";
+ };
+
+ /* Audio Related start */
+ pdm_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+
+ dummy_codec:dummy {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+
+ tl1_codec:codec {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, tl1_acodec";
+ status = "okay";
+ reg = <0x0 0xff632000 0x0 0x1c>;
+ tdmout_index = <0>;
+ tdmin_index = <0>;
+ dat1_ch_sel = <1>;
+ };
+
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-tl1";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+
+ //pinctrl-names="dtvdemod_agc";
+ //pinctrl-0=<&dtvdemod_agc>;
+
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ reg = <0x0 0xff650000 0x0 0x4000 /*dtv demod base*/
+ 0x0 0xff63c000 0x0 0x2000 /*hiu reg base*/
+ 0x0 0xff800000 0x0 0x1000 /*io_aobus_base*/
+ 0x0 0xffd01000 0x0 0x1000 /*reset*/
+ >;
+
+ dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
+ spectrum = <1>;
+ cma_flag = <1>;
+ cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ };
+
+ auge_sound {
+ compatible = "amlogic, tl1-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
+
+ aml-audio-card,dai-link@0 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdma>;
+ frame-master = <&tdma>;
+ /* slave mode */
+ /*
+ * bitclock-master = <&tdmacodec>;
+ * frame-master = <&tdmacodec>;
+ */
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-i2s";
+ tdmacpu: cpu {
+ sound-dai = <&tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmacodec: codec {
+ //sound-dai = <&dummy_codec>;
+ prefix-names = "AMP";
+ sound-dai = <&ad82584f &tl1_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmb>;
+ frame-master = <&tdmb>;
+ /* slave mode */
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pcm";
+ cpu {
+ sound-dai = <&tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ /*
+ * dai-tdm-slot-tx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-rx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-num = <8>;
+ */
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ status = "disabled";
+
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ /* master mode */
+ bitclock-master = <&tdmc>;
+ frame-master = <&tdmc>;
+ /* slave mode */
+ //bitclock-master = <&tdmccodec>;
+ //frame-master = <&tdmccodec>;
+ /* suffix-name, sync with android audio hal used for */
+ //suffix-name = "alsaPORT-tdm";
+ cpu {
+ sound-dai = <&tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmccodec: codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-pdm";
+ cpu {
+ sound-dai = <&pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ /* suffix-name, sync with android audio hal used for */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&spdifa>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&spdifb>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@6 {
+ mclk-fs = <256>;
+ suffix-name = "alsaPORT-tv";
+ cpu {
+ sound-dai = <&extn>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@7 {
+ mclk-fs = <256>;
+ continuous-clock;
+ suffix-name = "alsaPORT-loopback";
+ cpu {
+ sound-dai = <&loopbacka>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ /* Audio Related end */
+
+ dvb {
+ compatible = "amlogic, dvb";
+ status = "okay";
+ fe0_mode = "internal";
+ fe0_tuner = <&tuner>;
+
+ /*"parallel","serial","disable"*/
+ ts2 = "parallel";
+ ts2_control = <0>;
+ ts2_invert = <0>;
+ interrupts = <0 23 1
+ 0 5 1
+ 0 53 1
+ 0 19 1
+ 0 25 1
+ 0 17 1>;
+ interrupt-names = "demux0_irq",
+ "demux1_irq",
+ "demux2_irq",
+ "dvr0_irq",
+ "dvr1_irq",
+ "dvr2_irq";
+ clocks = <&clkc CLKID_DEMUX
+ &clkc CLKID_ASYNC_FIFO
+ &clkc CLKID_AHB_ARB0
+/* &clkc CLKID_DOS_PARSER>;*/
+ &clkc CLKID_U_PARSER>;
+ clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, tl1_tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ interrupts = <0 12 1>,
+ <0 13 1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enabel ;0:disable*/
+ wb_en = <1>;/*1:enabel ;0:disable*/
+ cm_en = <1>;/*1:enabel ;0:disable*/
+ wb_sel = <0>;/*1:mtx ;0:gainoff*/
+ vlock_en = <1>;/*1:enable;0:disable*/
+ vlock_mode = <0x4>;
+ /* vlock work mode:
+ *bit0:auto ENC
+ *bit1:auto PLL
+ *bit2:manual PLL
+ *bit3:manual ENC
+ *bit4:manual soft ENC
+ *bit5:manual MIX PLL ENC
+ */
+ vlock_pll_m_limit = <1>;
+ vlock_line_limit = <2>;
+ };
+
+ vdin@0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0x101>;
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <200>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ * bit8:use 8bit at 4k_50/60hz_10bit
+ * bit9:use 10bit at 4k_50/60hz_10bit
+ */
+ tv_bit_mode = <0x215>;
+ /* afbce_bit_mode: (amlogic frame buff compression encoder)
+ * bit0 -- enable afbce
+ * bit1 -- enable afbce compression-lossy
+ * bit4 -- afbce for 4k
+ * bit5 -- afbce for 1080p
+ * bit6 -- afbce for 720p
+ * bit7 -- afbce for smaller resolution
+ */
+ afbce_bit_mode = <0x11>;
+ };
+
+ vdin@1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*bit0:(1:share with codec_mm;0:cma alone)
+ *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+ */
+ flag_cma = <0>;
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <1>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <0x15>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-tl1";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0x0 0xff654000 0x0 0x2000>;/*tvafe reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
+ cutwindow_val_v = <4 8 14 16 24>; /* level 0~4 */
+ /* auto_adj_en:
+ * bit0 -- auto cdto
+ * bit1 -- auto hs
+ * bit2 -- auto vs
+ * bit3 -- auto de
+ * bit4 -- auto 3dcomb
+ * bit5 -- auto pga
+ */
+ auto_adj_en = <0x3e>;
+ /* val: default=0, 0x1, 0xf1, 0xe1, 0x11 for special tuner
+ * force_flag: force setting to std mode, default=0
+ */
+ nostd_vs_th = <0 0>; /* val, force_flag */
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ status = "okay";
+ interrupts = <0 83 1>;
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-tl1";
+ status = "disabled";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+ /* clk path */
+ /* 0:vid_pll vid2_clk */
+ /* 1:gp0_pll vid2_clk */
+ /* 2:vid_pll vid1_clk */
+ /* 3:gp0_pll vid1_clk */
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* tl1 */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ performance_sarft = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x0
+ 0x1b05 0x9
+ 0x1c59 0xfc48
+ 0xffff 0x0>; /* ending flag */
+ performance_revB_telecom = <0x1bf0 0x9
+ 0x1b56 0x546
+ 0x1b12 0x8080
+ 0x1b05 0x9
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power","up","down","enter","left","right","home";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
+ io-channel-names = "key-chan-2", "key-chan-3";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+ SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+ key_code = <116 103 108 28 105 106 102>;
+ key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40 40 40 40 40>;
+};
+
+ unifykey {
+ compatible = "amlogic, unifykey";
+ status = "okay";
+
+ unifykey-num = <21>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+ unifykey-index-13 = <&keysn_13>;
+ unifykey-index-14 = <&keysn_14>;
+ unifykey-index-15 = <&keysn_15>;
+ unifykey-index-16 = <&keysn_16>;
+ unifykey-index-17 = <&keysn_17>;
+ unifykey-index-18 = <&keysn_18>;
+ unifykey-index-19 = <&keysn_19>;
+ unifykey-index-20 = <&keysn_20>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "hdcp22_rx_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "hdcp22_rx_fw";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "hdcp14_rx";
+ key-device = "normal";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_18:key_18{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_19:key_19{
+ key-name = "lcd_tcon";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_20:key_20{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_tl1";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ memory-region = <&hdmirx_emp_cma_reserved>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux>;
+ repeat = <0>;
+ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+ <&clkc CLKID_HDMIRX_CFG_COMP>,
+ <&clkc CLKID_HDMIRX_ACR_COMP>,
+ <&clkc CLKID_HDMIRX_METER_COMP>,
+ <&clkc CLKID_HDMIRX_AXI_COMP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV7>,
+ <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ // <&clkc CLK_AUD_PLL2FS>,
+ // <&clkc CLK_AUD_PLL4FS>,
+ // <&clkc CLK_AUD_OUT>;
+ clock-names = "hdmirx_modet_clk",
+ "hdmirx_cfg_clk",
+ "hdmirx_acr_ref_clk",
+ "cts_hdmirx_meter_clk",
+ "cts_hdmi_axi_clk",
+ "xtal",
+ "fclk_div5",
+ "fclk_div7",
+ "hdcp_rx22_skp",
+ "hdcp_rx22_esm";
+ // "hdmirx_aud_pll2fs",
+ // "hdmirx_aud_pll4f",
+ // "clk_aud_out";
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ hpd_low_cec_off = <1>;
+ /* bit4: enable feature, bit3~0: port number */
+ disable_port = <0x0>;
+ /* MAP_ADDR_MODULE_CBUS */
+ /* MAP_ADDR_MODULE_HIU */
+ /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+ /* MAP_ADDR_MODULE_SEC_AHB */
+ /* MAP_ADDR_MODULE_SEC_AHB2 */
+ /* MAP_ADDR_MODULE_APB4 */
+ /* MAP_ADDR_MODULE_TOP */
+ reg = < 0x0 0x0 0x0 0x0
+ 0x0 0xff63C000 0x0 0x2000
+ 0x0 0xffe0d000 0x0 0x2000
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0
+ 0x0 0xff610000 0x0 0xa000>;
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-tl1";
+ /*device_name = "aocec";*/
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "TL1"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ port_num = <3>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1
+ 0 199 1>;
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&aoceca_mux>;
+ pinctrl-1=<&aocecb_mux>;
+ pinctrl-2=<&aoceca_mux>;
+ reg = <0x0 0xFF80023c 0x0 0x4
+ 0x0 0xFF800000 0x0 0x400>;
+ reg-names = "ao_exit","ao";
+ };
+
+ p_tsensor: p_tsensor@ff634800 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xff634800 0x0 0x50>,
+ <0x0 0xff800268 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 35 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@ff634c00 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xff634c00 0x0 0x50>,
+ <0x0 0xff800230 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 36 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ s_tsensor: s_tsensor@ff635000 {
+ compatible = "amlogic, r1p1-tsensor";
+ status = "okay";
+ reg = <0x0 0xff635000 0x0 0x50>,
+ <0x0 0xff80026c 0x0 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 38 0>;
+ clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <140>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ gpu_pp = <2>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };/*meson cooling devices end*/
+
+ thermal-zones {
+ pll_thermal: pll_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 11>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ sar_thermal: sar_thermal {
+ polling-delay = <2000>;
+ polling-delay-passive = <1000>;
+ sustainable-power = <1322>;
+ thermal-sensors = <&s_tsensor 2>;
+ trips {
+ sswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ scontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ shot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ scritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ }; /*thermal zone end*/
+
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <749000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <749000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <749000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <769000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <789000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <799000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1404000000>;
+ opp-microvolt = <799000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <819000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <829000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <869000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <919000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <969000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ status = "okay";
+ };
+
+ tuner: tuner {
+ compatible = "amlogic, tuner";
+ status = "okay";
+ tuner_cur = <0>; /* default use tuner */
+ tuner_num = <1>; /* tuner number, multi tuner support */
+ tuner_name_0 = "mxl661_tuner";
+ tuner_i2c_adap_0 = <&i2c0>;
+ tuner_i2c_addr_0 = <0x60>;
+ tuner_xtal_0 = <1>; /* 0: 16MHz, 1: 24MHz */
+ tuner_xtal_mode_0 = <3>;
+ /* NO_SHARE_XTAL(0)
+ * SLAVE_XTAL_SHARE(3)
+ */
+ tuner_xtal_cap_0 = <25>; /* when tuner_xtal_mode = 3, set 25 */
+ };
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ tuner = <&tuner>;
+ btsc_sap_mode = <1>;
+ /* pinctrl-names="atvdemod_agc_pins"; */
+ /* pinctrl-0=<&atvdemod_agc_pins>; */
+ reg = <0x0 0xff656000 0x0 0x2000 /* demod reg */
+ 0x0 0xff63c000 0x0 0x2000 /* hiu reg */
+ 0x0 0xff634000 0x0 0x2000 /* periphs reg */
+ 0x0 0xff64a000 0x0 0x2000>; /* audio reg */
+ reg_23cf = <0x88188832>;
+ /*default:0x88188832;r840 on haier:0x48188832*/
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ dhd_static_buf; //dhd_static_buf support
+ power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_b_pins1>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ab MESON_PWM_1 30541 0>;
+ duty-cycle = <15270>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ab MESON_PWM_3 30500 0>;
+ duty-cycle = <15250>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_b: sdio@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-tl1";
+ reg = <0x0 0xffe05000 0x0 0x800>;
+ interrupts = <0 190 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE", /**ptm debug */
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+/* sd_emmc_b: sd@ffe05000 {
+ * status = "okay";
+ * compatible = "amlogic, meson-mmc-tl1";
+ * reg = <0xffe05000 0x800>;
+ * interrupts = <0 190 1>;
+ *
+ * pinctrl-names = "sd_all_pins",
+ * "sd_clk_cmd_pins",
+ * "sd_1bit_pins";
+ * pinctrl-0 = <&sd_all_pins>;
+ * pinctrl-1 = <&sd_clk_cmd_pins>;
+ * pinctrl-2 = <&sd_1bit_pins>;
+ *
+ * clocks = <&clkc CLKID_SD_EMMC_B>,
+ * <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ * <&clkc CLKID_FCLK_DIV2>,
+ * <&clkc CLKID_FCLK_DIV5>,
+ * <&xtal>;
+ * clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ * bus-width = <4>;
+ * cap-sd-highspeed;
+ * cap-mmc-highspeed;
+ * max-frequency = <100000000>;
+ * disable-wp;
+ * sd {
+ * pinname = "sd";
+ * ocr_avail = <0x200080>;
+ * caps = "MMC_CAP_4_BIT_DATA",
+ * "MMC_CAP_MMC_HIGHSPEED",
+ * "MMC_CAP_SD_HIGHSPEED";
+ * f_min = <400000>;
+ * f_max = <200000000>;
+ * max_req_size = <0x20000>;
+ * no_sduart = <1>;
+ * gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ * jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ * gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ * card_type = <5>;
+ * };
+ * };
+ */
+
+}; /* end of / */
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+ tdma:tdm@0 {
+ compatible = "amlogic, tl1-snd-tdma";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0>;
+ dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+ dai-tdm-clk-sel = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0
+ &clkc CLKID_MPLL1
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "mclk", "clk_srcpll",
+ "samesource_srcpll", "samesource_clk";
+
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
+ pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
+
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ */
+ samesource_sel = <3>;
+
+ /* In for ACODEC_ADC */
+ acodec_adc = <1>;
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ /*enable default mclk(12.288M), before extern codec start*/
+ start_clk_enable = <1>;
+
+ /*tdm clk tuning enable*/
+ clk_tuning_enable = <1>;
+ status = "okay";
+
+ /* !!!For --TV platform-- ONLY */
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Spdif_samesource_Channel_Mask = "i2s_2/3";
+ };
+ };
+
+ tdmb:tdm@1 {
+ compatible = "amlogic, tl1-snd-tdmb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmc:tdm@2 {
+ compatible = "amlogic, tl1-snd-tdmc";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+ mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
+
+ status = "okay";
+ };
+
+ tdmlb:tdm@3 {
+ compatible = "amlogic, tl1-snd-tdmlb";
+ #sound-dai-cells = <0>;
+
+ dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+
+ /*
+ * select tdmin_lb src;
+ * AXG
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA
+ * 4: PAD_TDMINB
+ * 5: PAD_TDMINC
+ *
+ * G12A/G12B
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*, oe pin
+ * 7: PAD_TDMINB_D*, oe pin
+ *
+ * TL1
+ * 0: TDMOUTA
+ * 1: TDMOUTB
+ * 2: TDMOUTC
+ * 3: PAD_TDMINA_DIN*
+ * 4: PAD_TDMINB_DIN*
+ * 5: PAD_TDMINC_DIN*
+ * 6: PAD_TDMINA_D*
+ * 7: PAD_TDMINB_D*
+ * 8: PAD_TDMINC_D*
+ * 9: HDMIRX_I2S
+ * 10: ACODEC_ADC
+ */
+ lb-src-sel = <1>;
+
+ status = "disabled";
+ };
+
+ spdifa:spdif@0 {
+ compatible = "amlogic, tl1-snd-spdif-a";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL1
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+ interrupts =
+ <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_spdifin";
+
+ pinctrl-names = "spdif_pins",
+ "spdif_pins_mute";
+ pinctrl-0 = <&spdifout_a>;
+ pinctrl-1 = <&spdifout_a_mute>;
+
+ /*
+ * whether do asrc for pcm and resample a or b
+ * if raw data, asrc is disabled automatically
+ * 0: "Disable",
+ * 1: "Enable:32K",
+ * 2: "Enable:44K",
+ * 3: "Enable:48K",
+ * 4: "Enable:88K",
+ * 5: "Enable:96K",
+ * 6: "Enable:176K",
+ * 7: "Enable:192K",
+ */
+ asrc_id = <0>;
+ auto_asrc = <3>;
+
+ /*spdif clk tuning enable*/
+ clk_tuning_enable = <1>;
+ status = "okay";
+ };
+
+ spdifb:spdif@1 {
+ compatible = "amlogic, tl1-snd-spdif-b";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+ &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+
+ status = "okay";
+ };
+
+ pdm:pdm {
+ compatible = "amlogic, tl1-snd-pdm";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+
+ /* mode 0~4, defalut:1 */
+ filter_mode = <1>;
+
+ status = "okay";
+ };
+
+ extn:extn {
+ compatible = "amlogic, snd-extn";
+ #sound-dai-cells = <0>;
+
+ interrupts =
+ <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_frhdmirx";
+
+ status = "okay";
+ };
+
+ aed:effect {
+ compatible = "amlogic, snd-effect-v2";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_EQDRC>;
+ clock-names = "gate", "srcpll", "eqdrc";
+
+ /*
+ * 0:tdmout_a
+ * 1:tdmout_b
+ * 2:tdmout_c
+ * 3:spdifout
+ * 4:spdifout_b
+ */
+ eqdrc_module = <0>;
+ /* max 0xf, each bit for one lane, usually one lane */
+ lane_mask = <0x1>;
+ /* max 0xff, each bit for one channel */
+ channel_mask = <0xff>;
+
+ status = "okay";
+ };
+
+ asrca: resample@0 {
+ compatible = "amlogic, tl1-resample-a";
+ clocks = <&clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A
+ &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ * FRHDMIRX, 8
+ */
+ resample_module = <8>;
+
+ status = "okay";
+ };
+
+ asrcb: resample@1 {
+ compatible = "amlogic, tl1-resample-b";
+
+ clocks = <&clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_MCLK_F
+ &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ */
+ resample_module = <3>;
+
+ status = "disabled";
+ };
+
+ vad:vad {
+ compatible = "amlogic, snd-vad";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+ &clkc CLKID_FCLK_DIV5
+ &clkaudio CLKID_AUDIO_VAD>;
+ clock-names = "gate", "pll", "clk";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+ /*
+ * Data src sel:
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ * 5: loopback_b;
+ * 6: tdmin_lb;
+ * 7: loopback_a;
+ */
+ src = <4>;
+
+ /*
+ * deal with hot word in user space or kernel space
+ * 0: in user space
+ * 1: in kernel space
+ */
+ level = <1>;
+
+ status = "okay";
+ };
+
+ loopbacka:loopback@0 {
+ compatible = "amlogic, tl1-loopbacka";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* calc mclk for datalb */
+ mclk-fs = <256>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <0>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "okay";
+ };
+
+ loopbackb:loopback@1 {
+ compatible = "amlogic, tl1-loopbackb";
+ #sound-dai-cells = <0>;
+
+ clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1
+ &clkc CLKID_MPLL0
+ &clkaudio CLKID_AUDIO_MCLK_A>;
+ clock-names = "pdm_gate",
+ "pdm_sysclk_srcpll",
+ "pdm_dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk",
+ "tdminlb_mpll",
+ "tdminlb_mclk";
+
+ /* calc mclk for datain_lb */
+ mclk-fs = <256>;
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <4>;
+ datain_chmask = <0xf>;
+ /* config which data pin for loopback */
+ datain-lane-mask-in = <1 0 1 0>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_TDMINA_DIN*, refer to core pinmux
+ * 4: PAD_TDMINB_DIN*, refer to core pinmux
+ * 5: PAD_TDMINC_DIN*, refer to core pinmux
+ * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+ * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+ */
+ /* if tdmin_lb >= 3, use external loopback */
+ datalb_src = <1>;
+ datalb_chnum = <2>;
+ datalb_chmask = <0x3>;
+ /* config which data pin as loopback */
+ datalb-lane-mask-in = <1 0 0 0>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ /* audio pin mux */
+
+ tdma_mclk: tdma_mclk {
+ mux { /* GPIOZ_0 */
+ groups = "mclk0_z";
+ function = "mclk0";
+ };
+ };
+
+ tdmout_a: tdmout_a {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "tdma_sclk_z",
+ "tdma_fs_z",
+ "tdma_dout0_z";
+ function = "tdma_out";
+ bias-pull-down;
+ };
+ };
+
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ tdmin_a: tdmin_a {
+ mux { /* GPIOZ_9 */
+ groups = "tdma_din2_z";
+ function = "tdma_in";
+ };
+ };
+
+ tdmout_c: tdmout_c {
+ mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+ groups = "tdmc_sclk",
+ "tdmc_fs",
+ "tdmc_dout0";
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c: tdmin_c {
+ mux { /* GPIODV_10 */
+ groups = "tdmc_din1";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin_a: spdifin_a {
+ mux { /* GPIODV_5 */
+ groups = "spdif_in";
+ function = "spdif_in";
+ };
+ };
+
+ spdifout_a: spdifout_a {
+ mux { /* GPIODV_4 */
+ groups = "spdif_out_dv4";
+ function = "spdif_out";
+ };
+ };
+
+ spdifout_a_mute: spdifout_a_mute {
+ mux { /* GPIODV_4 */
+ groups = "GPIODV_4";
+ function = "gpio_periphs";
+ };
+ };
+
+ pdmin: pdmin {
+ mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
+ groups = "pdm_dclk_z",
+ "pdm_din0_z",
+ "pdm_din2_z4";
+ function = "pdm";
+ };
+ };
+
+ /*backlight*/
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_off_pins:bl_pwm_off_pin {
+ mux {
+ groups = "GPIOZ_5";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+ bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z5";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+ mux {
+ groups = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
+ mux {
+ groups = "GPIOZ_5",
+ "GPIOZ_6";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&audio_data{
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_z_pins>;
+ clock-frequency = <400000>;
+
+ tas5805: tas5805@36 {
+ compatible = "ti,tas5805";
+ #sound-dai-cells = <0>;
+ codec_name = "tas5805";
+ reg = <0x2d>;
+ status = "disable";
+ };
+
+ ad82584f: ad82584f@62 {
+ compatible = "ESMT, ad82584f";
+ #sound-dai-cells = <0>;
+ reg = <0x31>;
+ status = "okay";
+ reset_pin = <&gpio_ao GPIOAO_6 0>;
+ };
+
+};
+
+&sd_emmc_c {
+ status = "okay";
+ emmc {
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23",
+ "MMC_CAP_DRIVER_TYPE_D";
+ caps2 = "MMC_CAP2_HS200";
+ /*MMC_CAP2_HS400"*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+
+
+&spifc {
+ status = "disabled";
+ spi-nor@0 {
+ cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&slc_nand {
+ status = "disabled";
+ plat-names = "bootloader", "nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad = "ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+};
+
+ðmac {
+ status = "okay";
+ pinctrl-names = "internal_eth_pins";
+ pinctrl-0 = <&internal_eth_pins>;
+ mc_val = <0x4be04>;
+
+ internal_phy=<1>;
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&usb2_phy_v2 {
+ status = "okay";
+ portnum = <3>;
+};
+
+&usb3_phy_v2 {
+ status = "okay";
+ portnum = <0>;
+ otg = <0>;
+};
+
+&dwc2_a {
+ status = "okay";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <1>;
+};
+
+&spicc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc0_pins_h>;
+ cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+ status = "disabled";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
+ logo_addr = "0x7f800000";
+ mem_alloc = <0>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&drm_vpu {
+ status = "okay";
+ logo_addr = "0x3f800000";
+ osd_ver = /bits/ 8 <OSD_V4>;
+};
+
+&drm_amhdmitx {
+ status = "disabled";
+ hdcp = "disabled";
+};
+
+&drm_lcd {
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c1_h_pins>;
+
+ lcd_extern_i2c0: lcd_extern_i2c@0 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_T5800Q";
+ reg = <0x1c>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c1: lcd_extern_i2c@1 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX6862";
+ reg = <0x20>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c2: lcd_extern_i2c@2 {
+ compatible = "lcd_ext, i2c";
+ dev_name = "i2c_ANX7911";
+ reg = <0x74>;
+ status = "okay";
+ };
+};
+
+&pwm_ab {
+ status = "okay";
+};
+
+&pwm_cd {
+ status = "okay";
+};
+
+&efuse {
+ status = "okay";
+};
if (!lcd->mode)
return 0;
+ /*ToDo:the below is no use,may delete it!*/
mode = drm_mode_duplicate(drm, lcd->mode);
if (!mode)
return 0;
{
struct lcd_config_s *pconf;
unsigned short tmp;
+ char *vout_mode;
if (!lcd->lcd_drv) {
pr_info("invalid lcd driver\n");
pr_info("am_drm_lcd: %s %d\n", __func__, __LINE__);
pconf = lcd->lcd_drv->lcd_config;
+ vout_mode = get_vout_mode_internal();
lcd->mode = &am_lcd_mode;
lcd->timing = &am_lcd_timing;
+ if (vout_mode) {
+ strncpy(lcd->mode->name, vout_mode, DRM_DISPLAY_MODE_LEN);
+ lcd->mode->name[DRM_DISPLAY_MODE_LEN - 1] = 0;
+ /*ToDo:change it according to lcd drivers config*/
+ if (!strcmp(vout_mode, "panel"))
+ lcd->connector.connector_type = DRM_MODE_CONNECTOR_DSI;
+ else
+ lcd->connector.connector_type = DRM_MODE_CONNECTOR_LVDS;
+ }
lcd->mode->clock = pconf->lcd_timing.lcd_clk / 1000;
lcd->mode->hdisplay = pconf->lcd_basic.h_active;
tmp = pconf->lcd_basic.h_period - pconf->lcd_basic.h_active -
lcd->timing->vsync_len.typ = pconf->lcd_timing.vsync_width;
lcd->timing->vsync_len.max = pconf->lcd_timing.vsync_width;
- pr_info("am_drm_lcd: %s: lcd config:\n"
+ DRM_INFO("am_drm_lcd: %s: lcd config:\n"
"lcd_clk %d\n"
"h_active %d\n"
"v_active %d\n"
lcd->lcd_drv->lcd_config->lcd_basic.screen_height,
lcd->lcd_drv->lcd_config->lcd_timing.sync_duration_den,
lcd->lcd_drv->lcd_config->lcd_timing.sync_duration_num);
- pr_info("am_drm_lcd: %s: display mode:\n"
+ DRM_INFO("am_drm_lcd: %s: display mode:\n"
"clock %d\n"
"hdisplay %d\n"
"vdisplay %d\n"
lcd->mode->width_mm,
lcd->mode->height_mm,
lcd->mode->vrefresh);
- pr_info("am_drm_lcd: %s: timing:\n"
+ DRM_INFO("am_drm_lcd: %s: timing:\n"
"pixelclock %d\n"
"hactive %d\n"
"vactive %d\n",
lcd->timing->hactive.typ,
lcd->timing->vactive.typ);
- pr_info("am_drm_lcd: %s %d\n", __func__, __LINE__);
+ DRM_INFO("am_drm_lcd: %s %d\n", __func__, __LINE__);
}
+int am_drm_lcd_notify_callback(struct notifier_block *block, unsigned long cmd,
+ void *para)
+{
+ am_drm_lcd->lcd_drv = aml_lcd_get_driver();
+ if (!am_drm_lcd->lcd_drv) {
+ DRM_ERROR("invalid lcd driver, exit\n");
+ return -ENODEV;
+ }
+
+ switch (cmd) {
+ case VOUT_EVENT_MODE_CHANGE:
+ am_drm_lcd_display_mode_timing_init(am_drm_lcd);
+ DRM_INFO("%s:event MODE_CHANGE\n", __func__);
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+
+static struct notifier_block am_drm_lcd_notifier_nb = {
+ .notifier_call = am_drm_lcd_notify_callback,
+};
+
static const struct of_device_id am_meson_lcd_dt_ids[] = {
{ .compatible = "amlogic,drm-lcd", },
{},
pr_err("invalid lcd driver, exit\n");
return -ENODEV;
}
-
- am_drm_lcd_display_mode_timing_init(am_drm_lcd);
+ /*
+ * register vout client for timing init,
+ * avoid init with null info when lcd probe with unifykey case.
+ */
+ vout_register_client(&am_drm_lcd_notifier_nb);
drm_panel_init(&am_drm_lcd->panel);
am_drm_lcd->panel.dev = NULL;
char *am_meson_crtc_get_voutmode(struct drm_display_mode *mode)
{
int i;
+ struct vinfo_s *vinfo;
- if (!strcmp(mode->name, "panel"))
- return "panel";
+ vinfo = get_current_vinfo();
+
+ if (vinfo && vinfo->mode == VMODE_LCD)
+ return mode->name;
for (i = 0; i < ARRAY_SIZE(am_vout_modes); i++) {
if (am_vout_modes[i].width == mode->hdisplay &&
#define MAX_PORT_ID 32
static struct meson_vpu_block **vpu_blocks;
-static int num_blocks;
struct meson_vpu_link_para {
u8 id;
int i, j, id;
struct meson_vpu_block *mvb;
- for (i = 0; i < num_blocks; i++) {
+ for (i = 0; i < BLOCK_ID_MAX; i++) {
mvb = vpu_blocks[i];
if (!mvb)
struct device_node *child_node;
struct meson_vpu_block *mvb;
struct meson_vpu_block_para para;
+ u32 num_blocks;
num_blocks = of_get_child_count(vpu_block_node);
if (num_blocks <= 0)
return -ENODEV;
- vpu_blocks = kcalloc(num_blocks, sizeof(*vpu_blocks), GFP_KERNEL);
+ vpu_blocks = kcalloc(BLOCK_ID_MAX, sizeof(*vpu_blocks), GFP_KERNEL);
if (!vpu_blocks)
return -ENOMEM;
continue;
next_state = meson_vpu_block_get_state(mvbl->link, state);
if (next_state->in_stack) {
- //printk("%s already in stack.\n", mvbl->link->name);
+ DRM_DEBUG("%s already in stack.\n", mvbl->link->name);
continue;
}
if (!next_state->active) {
- //printk("%s is not active.\n", mvbl->link->name);
+ DRM_DEBUG("%s is not active.\n", mvbl->link->name);
continue;
}
if (!mvbl->edges_active) {
- //printk("edges is not active.\n");
+ DRM_DEBUG("edges is not active.\n");
continue;
}
if (mvbl->edges_visited) {
- //printk("edges is already visited.\n");
+ DRM_DEBUG("edges is already visited.\n");
continue;
}
stack_push(mvs, start);
mvt->num_path = 0;
j = 0;
+ DRM_DEBUG("start->id=%d,name=%s\n", start->id, start->name);
+ DRM_DEBUG("end->id=%d,name=%s\n", end->id, end->name);
while (mvs->top) {
if (mvs->stack[mvs->top - 1] == end) {
next = neighbour(curr_state, &index, state);
if (next) {
+ DRM_DEBUG("next->id=%d,name=%s\n",
+ next->id, next->name);
curr_state->outputs[index].edges_visited = 1;
next_state =
meson_vpu_block_get_state(next, state);
stack_push(mvs, next);
next_state->in_stack = 1;
} else {
+ DRM_DEBUG("next is NULL!!\n");
stack_pop(mvs);
curr_state->in_stack = 0;
pipeline_visit_clean(curr_state);
#define OSD_BLEND_BLOCK 9
#define OSD1_HDR_BLOCK 10
#define VPP_POSTBLEND_BLOCK 11
+#define BLOCK_ID_MAX 12
#define OSD1_PORT 0
#define OSD2_PORT 1
projects / GitHub / LineageOS / G12 / android_kernel_amlogic_linux-4.9.git / commitdiff