FROMLIST: arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm...
authorCatalin Marinas <catalin.marinas@arm.com>
Fri, 1 Jul 2016 14:48:55 +0000 (15:48 +0100)
committerSami Tolvanen <samitolvanen@google.com>
Thu, 29 Sep 2016 17:52:56 +0000 (10:52 -0700)
This patch takes the errata workaround code out of cpu_do_switch_mm into
a dedicated post_ttbr0_update_workaround macro which will be reused in a
subsequent patch.

Cc: Will Deacon <will.deacon@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Change-Id: I69f94e4c41046bd52ca9340b72d97bfcf955b586
(cherry picked from commit 4398e6a1644373a4c2f535f4153c8378d0914630)
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
arch/arm64/include/asm/assembler.h
arch/arm64/mm/proc.S

index 9e8ac1e73457f4ec8e92deacec7bb48f14e91331..9d3e77a5cf07546fbd024c2f21615ea4a20f0880 100644 (file)
@@ -362,4 +362,21 @@ alternative_endif
        movk    \reg, :abs_g0_nc:\val
        .endm
 
+/*
+ * Errata workaround post TTBR0_EL1 update.
+ */
+       .macro  post_ttbr0_update_workaround
+#ifdef CONFIG_CAVIUM_ERRATUM_27456
+alternative_if_not ARM64_WORKAROUND_CAVIUM_27456
+       nop
+       nop
+       nop
+alternative_else
+       ic      iallu
+       dsb     nsh
+       isb
+alternative_endif
+#endif
+       .endm
+
 #endif /* __ASM_ASSEMBLER_H */
index 9f6deacf41d2e97f8027ece1fb43f7aa27b6e269..7657137026253ac38f90b2a8ac9491ffd2afbff3 100644 (file)
@@ -136,17 +136,8 @@ ENTRY(cpu_do_switch_mm)
        bfi     x0, x1, #48, #16                // set the ASID
        msr     ttbr0_el1, x0                   // set TTBR0
        isb
-alternative_if_not ARM64_WORKAROUND_CAVIUM_27456
+       post_ttbr0_update_workaround
        ret
-       nop
-       nop
-       nop
-alternative_else
-       ic      iallu
-       dsb     nsh
-       isb
-       ret
-alternative_endif
 ENDPROC(cpu_do_switch_mm)
 
        .pushsection ".idmap.text", "ax"