return rxpktprocessed;
}
+/* Rx NAPI polling method */
+static int bcmgenet_rx_poll(struct napi_struct *napi, int budget)
+{
+ struct bcmgenet_priv *priv = container_of(napi,
+ struct bcmgenet_priv, napi);
+ unsigned int work_done;
+
+ work_done = bcmgenet_desc_rx(priv, DESC_INDEX, budget);
+
+ if (work_done < budget) {
+ napi_complete(napi);
+ bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_RXDMA_BDONE |
+ UMAC_IRQ_RXDMA_PDONE,
+ INTRL2_CPU_MASK_CLEAR);
+ }
+
+ return work_done;
+}
+
/* Assign skb to RX DMA descriptor. */
static int bcmgenet_alloc_rx_buffers(struct bcmgenet_priv *priv,
struct bcmgenet_rx_ring *ring)
bcmgenet_tdma_writel(priv, dma_ctrl, DMA_CTRL);
}
+static void bcmgenet_init_rx_napi(struct bcmgenet_priv *priv)
+{
+ netif_napi_add(priv->dev, &priv->napi, bcmgenet_rx_poll, 64);
+}
+
+static void bcmgenet_enable_rx_napi(struct bcmgenet_priv *priv)
+{
+ napi_enable(&priv->napi);
+}
+
+static void bcmgenet_disable_rx_napi(struct bcmgenet_priv *priv)
+{
+ napi_disable(&priv->napi);
+}
+
+static void bcmgenet_fini_rx_napi(struct bcmgenet_priv *priv)
+{
+ netif_napi_del(&priv->napi);
+}
+
/* Initialize Rx queues
*
* Queues 0-15 are priority queues. Hardware Filtering Block (HFB) can be
ring_cfg |= (1 << DESC_INDEX);
dma_ctrl |= (1 << (DESC_INDEX + DMA_RING_BUF_EN_SHIFT));
+ /* Initialize Rx NAPI */
+ bcmgenet_init_rx_napi(priv);
+
/* Enable rings */
bcmgenet_rdma_writel(priv, ring_cfg, DMA_RING_CFG);
static void bcmgenet_fini_dma(struct bcmgenet_priv *priv)
{
+ bcmgenet_fini_rx_napi(priv);
bcmgenet_fini_tx_napi(priv);
__bcmgenet_fini_dma(priv);
return 0;
}
-/* NAPI polling method*/
-static int bcmgenet_poll(struct napi_struct *napi, int budget)
-{
- struct bcmgenet_priv *priv = container_of(napi,
- struct bcmgenet_priv, napi);
- unsigned int work_done;
-
- work_done = bcmgenet_desc_rx(priv, DESC_INDEX, budget);
-
- if (work_done < budget) {
- napi_complete(napi);
- bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_RXDMA_BDONE |
- UMAC_IRQ_RXDMA_PDONE,
- INTRL2_CPU_MASK_CLEAR);
- }
-
- return work_done;
-}
-
/* Interrupt bottom half */
static void bcmgenet_irq_task(struct work_struct *work)
{
struct bcmgenet_priv *priv = netdev_priv(dev);
/* Start the network engine */
- napi_enable(&priv->napi);
+ bcmgenet_enable_rx_napi(priv);
bcmgenet_enable_tx_napi(priv);
umac_enable_set(priv, CMD_TX_EN | CMD_RX_EN, true);
struct bcmgenet_priv *priv = netdev_priv(dev);
netif_tx_stop_all_queues(dev);
- napi_disable(&priv->napi);
phy_stop(priv->phydev);
-
bcmgenet_intr_disable(priv);
+ bcmgenet_disable_rx_napi(priv);
bcmgenet_disable_tx_napi(priv);
/* Wait for pending work items to complete. Since interrupts are
dev->watchdog_timeo = 2 * HZ;
dev->ethtool_ops = &bcmgenet_ethtool_ops;
dev->netdev_ops = &bcmgenet_netdev_ops;
- netif_napi_add(dev, &priv->napi, bcmgenet_poll, 64);
priv->msg_enable = netif_msg_init(-1, GENET_MSG_DEFAULT);