++ +++menu "SoC Audio for Freescale CPUs"
++ +++
++ +++comment "Common SoC Audio options for Freescale CPUs:"
++ +++
config SND_SOC_FSL_SAI
-- ---- tristate
++ ++++ tristate "Synchronous Audio Interface (SAI) module support"
select REGMAP_MMIO
select SND_SOC_GENERIC_DMAENGINE_PCM
++ ++++ help
++ ++++ Say Y if you want to add Synchronous Audio Interface (SAI)
++ ++++ support for the Freescale CPUs.
++ ++++ This option is only useful for out-of-tree drivers since
++ ++++ in-tree drivers select it automatically.
config SND_SOC_FSL_SSI
-- --- tristate
++ +++ tristate "Synchronous Serial Interface module support"
++ ++++ select SND_SOC_IMX_PCM_DMA if SND_IMX_SOC != n
++ ++++ select SND_SOC_IMX_PCM_FIQ if SND_IMX_SOC != n && ARCH_MXC
++ +++ help
++ +++ Say Y if you want to add Synchronous Serial Interface (SSI)
++ +++ support for the Freescale CPUs.
++ +++ This option is only useful for out-of-tree drivers since
++ +++ in-tree drivers select it automatically.
config SND_SOC_FSL_SPDIF
-- --- tristate
++ +++ tristate "Sony/Philips Digital Interface module support"
select REGMAP_MMIO
++ ++++ select SND_SOC_IMX_PCM_DMA if SND_IMX_SOC != n
++ ++++ select SND_SOC_IMX_PCM_FIQ if SND_IMX_SOC != n && ARCH_MXC
++ +++ help
++ +++ Say Y if you want to add Sony/Philips Digital Interface (SPDIF)
++ +++ support for the Freescale CPUs.
++ +++ This option is only useful for out-of-tree drivers since
++ +++ in-tree drivers select it automatically.
config SND_SOC_FSL_ESAI
-- ---- tristate
++ ++++ tristate "Enhanced Serial Audio Interface (ESAI) module support"
select REGMAP_MMIO
select SND_SOC_FSL_UTILS
++ ++++ help
++ ++++ Say Y if you want to add Enhanced Synchronous Audio Interface
++ ++++ (ESAI) support for the Freescale CPUs.
++ ++++ This option is only useful for out-of-tree drivers since
++ ++++ in-tree drivers select it automatically.
config SND_SOC_FSL_UTILS
tristate
struct clk *clksrc = esai_priv->extalclk;
bool tx = clk_id <= ESAI_HCKT_EXTAL;
bool in = dir == SND_SOC_CLOCK_IN;
-- --- u32 ret, ratio, ecr = 0;
++ +++ u32 ratio, ecr = 0;
unsigned long clk_rate;
++ +++ int ret;
++ +++
+++ +++ /* Bypass divider settings if the requirement doesn't change */
+++ +++ if (freq == esai_priv->hck_rate[tx] && dir == esai_priv->hck_dir[tx])
+++ +++ return 0;
+
/* sck_div can be only bypassed if ETO/ERO=0 and SNC_SOC_CLOCK_OUT */
esai_priv->sck_div[tx] = true;