drm/msm/dsi: Add 8x96 info in dsi_cfg
authorArchit Taneja <architt@codeaurora.org>
Wed, 14 Sep 2016 06:53:07 +0000 (12:23 +0530)
committerRob Clark <robdclark@gmail.com>
Mon, 6 Feb 2017 16:28:44 +0000 (11:28 -0500)
Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver
enables core_mmss_clk. We're seeing some branch clock warnings on
8x96 when enabling this. There doesn't seem to be any negative effect
with not enabling this clock, so use it once we figure out why we
get the warnings.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/dsi/dsi_cfg.c
drivers/gpu/drm/msm/dsi/dsi_cfg.h

index 63436d8ee470ea1ca98728ac7707d8ee141ecb9c..a5d75c9b3a737560b6d190182a7cb7a3837588ae 100644 (file)
@@ -94,6 +94,30 @@ static const struct msm_dsi_config msm8994_dsi_cfg = {
        .num_dsi = 2,
 };
 
+/*
+ * TODO: core_mmss_clk fails to enable for some reason, but things work fine
+ * without it too. Figure out why it doesn't enable and uncomment below
+ */
+static const char * const dsi_8996_bus_clk_names[] = {
+       "mdp_core_clk", "iface_clk", "bus_clk", /* "core_mmss_clk", */
+};
+
+static const struct msm_dsi_config msm8996_dsi_cfg = {
+       .io_offset = DSI_6G_REG_SHIFT,
+       .reg_cfg = {
+               .num = 2,
+               .regs = {
+                       {"vdda", 18160, 1 },    /* 1.25 V */
+                       {"vcca", 17000, 32 },   /* 0.925 V */
+                       {"vddio", 100000, 100 },/* 1.8 V */
+               },
+       },
+       .bus_clk_names = dsi_8996_bus_clk_names,
+       .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
+       .io_start = { 0x994000, 0x996000 },
+       .num_dsi = 2,
+};
+
 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
        {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},
        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
@@ -106,6 +130,7 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
                                                &msm8974_apq8084_dsi_cfg},
        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
        {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
+       {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, &msm8996_dsi_cfg},
 };
 
 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
index eeacc323249481c14fc75d477824420fdd56637e..00a5da2663c65e400090cdc7535cbbaad80d8807 100644 (file)
@@ -24,6 +24,7 @@
 #define MSM_DSI_6G_VER_MINOR_V1_2      0x10020000
 #define MSM_DSI_6G_VER_MINOR_V1_3      0x10030000
 #define MSM_DSI_6G_VER_MINOR_V1_3_1    0x10030001
+#define MSM_DSI_6G_VER_MINOR_V1_4_1    0x10040001
 
 #define MSM_DSI_V2_VER_MINOR_8064      0x0