drm/radeon: use rcu waits in some ioctls
authorMaarten Lankhorst <maarten.lankhorst@canonical.com>
Wed, 14 May 2014 13:40:49 +0000 (15:40 +0200)
committerMaarten Lankhorst <maarten.lankhorst@canonical.com>
Tue, 2 Sep 2014 14:41:50 +0000 (16:41 +0200)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
drivers/gpu/drm/radeon/radeon_gem.c

index 01b58941acd4770cdbdd9f39915ee92db9646879..4b7c8ec36c2f02f19aadf2f17d78eb84b50a25fa 100644 (file)
@@ -94,7 +94,7 @@ static int radeon_gem_set_domain(struct drm_gem_object *gobj,
 {
        struct radeon_bo *robj;
        uint32_t domain;
-       int r;
+       long r;
 
        /* FIXME: reeimplement */
        robj = gem_to_radeon_bo(gobj);
@@ -110,9 +110,12 @@ static int radeon_gem_set_domain(struct drm_gem_object *gobj,
        }
        if (domain == RADEON_GEM_DOMAIN_CPU) {
                /* Asking for cpu access wait for object idle */
-               r = radeon_bo_wait(robj, NULL, false);
-               if (r) {
-                       printk(KERN_ERR "Failed to wait for object !\n");
+               r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
+               if (!r)
+                       r = -EBUSY;
+
+               if (r < 0 && r != -EINTR) {
+                       printk(KERN_ERR "Failed to wait for object: %li\n", r);
                        return r;
                }
        }
@@ -449,15 +452,22 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
        struct drm_radeon_gem_wait_idle *args = data;
        struct drm_gem_object *gobj;
        struct radeon_bo *robj;
-       int r;
+       int r = 0;
        uint32_t cur_placement = 0;
+       long ret;
 
        gobj = drm_gem_object_lookup(dev, filp, args->handle);
        if (gobj == NULL) {
                return -ENOENT;
        }
        robj = gem_to_radeon_bo(gobj);
-       r = radeon_bo_wait(robj, &cur_placement, false);
+
+       ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
+       if (ret == 0)
+               r = -EBUSY;
+       else if (ret < 0)
+               r = ret;
+
        /* Flush HDP cache via MMIO if necessary */
        if (rdev->asic->mmio_hdp_flush &&
            radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)