ARM: at91/dt: at91sam9x5: use slow clock where necessary

The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it where necessary,
The LCD PWM will be handled later.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index b6c8df8d380ea41c9ed9807fb15dd4708d23a913..747d8f070a5c267e66edabc0dfede8858c03f102 100644 (file)
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -376,11 +376,13 @@
                        rstc@fffffe00 {
                                compatible = "atmel,at91sam9g45-rstc";
                                reg = <0xfffffe00 0x10>;
+                               clocks = <&clk32k>;
                        };
 
                        shdwc@fffffe10 {
                                compatible = "atmel,at91sam9x5-shdwc";
                                reg = <0xfffffe10 0x10>;
+                               clocks = <&clk32k>;
                        };
 
                        pit: timer@fffffe30 {
@@ -418,16 +420,16 @@
                                compatible = "atmel,at91sam9x5-tcb";
                                reg = <0xf8008000 0x100>;
                                interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
-                               clocks = <&tcb0_clk>;
-                               clock-names = "t0_clk";
+                               clocks = <&tcb0_clk>, <&clk32k>;
+                               clock-names = "t0_clk", "slow_clk";
                        };
 
                        tcb1: timer@f800c000 {
                                compatible = "atmel,at91sam9x5-tcb";
                                reg = <0xf800c000 0x100>;
                                interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
-                               clocks = <&tcb0_clk>;
-                               clock-names = "t0_clk";
+                               clocks = <&tcb0_clk>, <&clk32k>;
+                               clock-names = "t0_clk", "slow_clk";
                        };
 
                        dma0: dma-controller@ffffec00 {
@@ -1173,6 +1175,7 @@
                                compatible = "atmel,at91sam9260-wdt";
                                reg = <0xfffffe40 0x10>;
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&clk32k>;
                                atmel,watchdog-type = "hardware";
                                atmel,reset-type = "all";
                                atmel,dbg-halt;
@@ -1183,6 +1186,7 @@
                                compatible = "atmel,at91sam9x5-rtc";
                                reg = <0xfffffeb0 0x40>;
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&clk32k>;
                                status = "disabled";
                        };