dmaengine: dw: convert to __ffs()
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Mon, 28 Sep 2015 15:57:04 +0000 (18:57 +0300)
committerVinod Koul <vinod.koul@intel.com>
Wed, 30 Sep 2015 08:13:09 +0000 (13:43 +0530)
We replace __fls() by __ffs() since we have to find a *minimum* data width that
satisfies both source and destination.

While here, rename dwc_fast_fls() to dwc_fast_ffs() which it really is.

Fixes: 4c2d56c574db (dw_dmac: introduce dwc_fast_fls())
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/dw/core.c

index cf1c87fa1edd557eb57f53dd41c11c02a440ea82..46859f738fcfe9ed7458d584875d8015dfbdd419 100644 (file)
@@ -163,7 +163,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
 
 /*----------------------------------------------------------------------*/
 
-static inline unsigned int dwc_fast_fls(unsigned long long v)
+static inline unsigned int dwc_fast_ffs(unsigned long long v)
 {
        /*
         * We can be a lot more clever here, but this should take care
@@ -712,7 +712,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
                           dw->data_width[dwc->dst_master]);
 
        src_width = dst_width = min_t(unsigned int, data_width,
-                                     dwc_fast_fls(src | dest | len));
+                                     dwc_fast_ffs(src | dest | len));
 
        ctllo = DWC_DEFAULT_CTLLO(chan)
                        | DWC_CTLL_DST_WIDTH(dst_width)
@@ -791,7 +791,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 
        switch (direction) {
        case DMA_MEM_TO_DEV:
-               reg_width = __fls(sconfig->dst_addr_width);
+               reg_width = __ffs(sconfig->dst_addr_width);
                reg = sconfig->dst_addr;
                ctllo = (DWC_DEFAULT_CTLLO(chan)
                                | DWC_CTLL_DST_WIDTH(reg_width)
@@ -811,7 +811,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                        len = sg_dma_len(sg);
 
                        mem_width = min_t(unsigned int,
-                                         data_width, dwc_fast_fls(mem | len));
+                                         data_width, dwc_fast_ffs(mem | len));
 
 slave_sg_todev_fill_desc:
                        desc = dwc_desc_get(dwc);
@@ -848,7 +848,7 @@ slave_sg_todev_fill_desc:
                }
                break;
        case DMA_DEV_TO_MEM:
-               reg_width = __fls(sconfig->src_addr_width);
+               reg_width = __ffs(sconfig->src_addr_width);
                reg = sconfig->src_addr;
                ctllo = (DWC_DEFAULT_CTLLO(chan)
                                | DWC_CTLL_SRC_WIDTH(reg_width)
@@ -868,7 +868,7 @@ slave_sg_todev_fill_desc:
                        len = sg_dma_len(sg);
 
                        mem_width = min_t(unsigned int,
-                                         data_width, dwc_fast_fls(mem | len));
+                                         data_width, dwc_fast_ffs(mem | len));
 
 slave_sg_fromdev_fill_desc:
                        desc = dwc_desc_get(dwc);