[COMMON] media: smfc: dump all control registers on an error interrupt
authorCho KyongHo <pullip.cho@samsung.com>
Thu, 2 Apr 2015 07:27:36 +0000 (16:27 +0900)
committerCosmin Tanislav <demonsingur@gmail.com>
Mon, 22 Apr 2024 17:22:18 +0000 (20:22 +0300)
The current dump is based on Exynos7420 that is the most recent
version of H/W JPEG of the same series.

Change-Id: Ib674d6ce75addb60d94970c4abd3d019a66133f5
Signed-off-by: Cho KyongHo <pullip.cho@samsung.com>
drivers/media/platform/exynos/smfc/smfc-regs.c
drivers/media/platform/exynos/smfc/smfc-regs.h
drivers/media/platform/exynos/smfc/smfc.c
drivers/media/platform/exynos/smfc/smfc.h

index 0c54ae662f1ec69568bbb983bbfa3ddcb71a583d..fc3a5ccd60ac03360299d942575180f77d2c1d26 100644 (file)
@@ -288,3 +288,35 @@ bool smfc_hwstatus_okay(struct smfc_dev *smfc)
 
        return true;
 }
+
+void smfc_dump_registers(struct smfc_dev *smfc)
+{
+       u32 val;
+
+       /* Register dump based on Istor */
+       pr_info("DUMPING REGISTERS OF H/W JPEG...\n");
+       pr_info("------------------------------------------------\n");
+       /* JPEG_CNTL ~ FIFO_STATUS */
+       print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 16, 4,
+                       smfc->reg + 0x000, 0xD4, false);
+       /* Reading quantization tables */
+       val = __raw_readl(smfc->reg + REG_TABLE_SELECT);
+       __raw_writel(val | SMFC_TABLE_READ_REQ_MASK,
+                       smfc->reg + REG_TABLE_SELECT);
+       for (val = 0; val < 512; val++) {
+               if (!!(__raw_readl(smfc->reg + REG_TABLE_SELECT)
+                                               & SMFC_TABLE_READ_OK_MASK))
+                       break;
+               cpu_relax();
+       }
+
+       if ((val == 512) &&
+               !(__raw_readl(smfc->reg + REG_TABLE_SELECT)
+                                               & SMFC_TABLE_READ_OK_MASK)) {
+               pr_info("** FAILED TO READ HUFFMAN and QUANTIZER TABLES **\n");
+               return;
+       }
+
+       print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 16, 4,
+                       smfc->reg + 0x100, 0x2C0, false);
+}
index 6c4edd601e846b1aa717f00e383dddc9d022a06c..5ba44667142a7df95517f2b886fc5a1bc5c1898e 100644 (file)
@@ -44,6 +44,9 @@
  * Component 1 and 2: Q-table 1, AC/DC table 1
  */
 #define VAL_TABLE_SELECT               0xF14
+#define SMFC_TABLE_READ_REQ_MASK       (1 << 13)
+#define SMFC_TABLE_READ_OK_MASK                (1 << 12)
+
 /* 64 reigsters for four quantization tables are prepared */
 #define REG_QTBL_BASE                  0x100
 /*
index 73b41d300053ee786657b8e171a2e473e85cb5c8..16aabcdadc9775a030c28d4f66554644ef0e58ca 100644 (file)
@@ -277,6 +277,7 @@ static irqreturn_t exynos_smfc_irq_handler(int irq, void *priv)
        u32 streamsize = smfc_get_streamsize(smfc);
 
        if (!smfc_hwstatus_okay(smfc)) {
+               smfc_dump_registers(smfc);
                state = VB2_BUF_STATE_ERROR;
                smfc_hwconfigure_reset(smfc);
        }
index 98e3a08c6546c78774e2cda61e6309a471eae31f..1ec785d9d293a2b0d974aed557f1dd098c99fac3 100644 (file)
@@ -98,6 +98,7 @@ void smfc_hwconfigure_image(struct smfc_ctx *ctx);
 void smfc_hwconfigure_start(struct smfc_ctx *ctx);
 bool smfc_hwstatus_okay(struct smfc_dev *smfc);
 void smfc_hwconfigure_reset(struct smfc_dev *smfc);
+void smfc_dump_registers(struct smfc_dev *smfc);
 static inline u32 smfc_get_streamsize(struct smfc_dev *smfc)
 {
        return __raw_readl(smfc->reg + REG_MAIN_STREAM_SIZE);