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drm/msm/mdp5: describe LM instances in mdp5_cfg
authorArchit Taneja <architt@codeaurora.org>
Thu, 23 Mar 2017 10:27:55 +0000 (15:57 +0530)
committerRob Clark <robdclark@gmail.com>
Sat, 8 Apr 2017 10:59:33 +0000 (06:59 -0400)
The number of Layer Mixers and the downstream blocks (DSPPs and PPs)
connected to each LM can vary with different MDP5 revisions. These
parameters are also static.

Keep the per instance LM data in mdp5_cfg. This will avoid the need
to have macros which identify PP id or DSPP id the LM is connected
to. We don't configure DSPPs at the moment, but keeping the DSPP
instance # here might come handy later.

Also add a 'caps' field that identifies features supported by a
LM instance. Introduce the caps MDP_LM_CAP_DISPLAY and MDP_LM_CAP_WB
that identify whether a LM instance can be used for display or
writeback.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c patch | blob | blame | history
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h patch | blob | blame | history
drivers/gpu/drm/msm/mdp/mdp_kms.h patch | blob | blame | history

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
index ba2d017f6591419ca7c32146c6e7031aa61fe916..124aa1e62aa5cda770198d784ec12e8b2795d687 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c
@@ -70,6 +70,18 @@ const struct mdp5_cfg_hw msm8x74v1_config = {
        .lm = {
                .count = 5,
                .base = { 0x03100, 0x03500, 0x03900, 0x03d00, 0x04100 },
+               .instances = {
+                               { .id = 0, .pp = 0, .dspp = 0,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 1, .pp = 1, .dspp = 1,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 2, .pp = 2, .dspp = 2,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 3, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB },
+                               { .id = 4, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB },
+                            },
                .nb_stages = 5,
        },
        .dspp = {
@@ -134,6 +146,18 @@ const struct mdp5_cfg_hw msm8x74v2_config = {
        .lm = {
                .count = 5,
                .base = { 0x03100, 0x03500, 0x03900, 0x03d00, 0x04100 },
+               .instances = {
+                               { .id = 0, .pp = 0, .dspp = 0,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 1, .pp = 1, .dspp = 1,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 2, .pp = 2, .dspp = 2,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 3, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                               { .id = 4, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                            },
                .nb_stages = 5,
                .max_width = 2048,
                .max_height = 0xFFFF,
@@ -211,6 +235,20 @@ const struct mdp5_cfg_hw apq8084_config = {
        .lm = {
                .count = 6,
                .base = { 0x03900, 0x03d00, 0x04100, 0x04500, 0x04900, 0x04d00 },
+               .instances = {
+                               { .id = 0, .pp = 0, .dspp = 0,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 1, .pp = 1, .dspp = 1,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 2, .pp = 2, .dspp = 2,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 3, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                               { .id = 4, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                               { .id = 5, .pp = 3, .dspp = 3,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                            },
                .nb_stages = 5,
                .max_width = 2048,
                .max_height = 0xFFFF,
@@ -282,6 +320,12 @@ const struct mdp5_cfg_hw msm8x16_config = {
        .lm = {
                .count = 2, /* LM0 and LM3 */
                .base = { 0x44000, 0x47000 },
+               .instances = {
+                               { .id = 0, .pp = 0, .dspp = 0,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 3, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB },
+                            },
                .nb_stages = 8,
                .max_width = 2048,
                .max_height = 0xFFFF,
@@ -350,6 +394,20 @@ const struct mdp5_cfg_hw msm8x94_config = {
        .lm = {
                .count = 6,
                .base = { 0x44000, 0x45000, 0x46000, 0x47000, 0x48000, 0x49000 },
+               .instances = {
+                               { .id = 0, .pp = 0, .dspp = 0,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 1, .pp = 1, .dspp = 1,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 2, .pp = 2, .dspp = 2,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 3, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                               { .id = 4, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                               { .id = 5, .pp = 3, .dspp = 3,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                            },
                .nb_stages = 8,
                .max_width = 2048,
                .max_height = 0xFFFF,
@@ -434,6 +492,20 @@ const struct mdp5_cfg_hw msm8x96_config = {
        .lm = {
                .count = 6,
                .base = { 0x44000, 0x45000, 0x46000, 0x47000, 0x48000, 0x49000 },
+               .instances = {
+                               { .id = 0, .pp = 0, .dspp = 0,
+                                 .caps = MDP_LM_CAP_DISPLAY },
+                               { .id = 1, .pp = 1, .dspp = 1,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                               { .id = 2, .pp = 2, .dspp = -1,
+                                 .caps = MDP_LM_CAP_DISPLAY },
+                               { .id = 3, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                               { .id = 4, .pp = -1, .dspp = -1,
+                                 .caps = MDP_LM_CAP_WB, },
+                               { .id = 5, .pp = 3, .dspp = -1,
+                                 .caps = MDP_LM_CAP_DISPLAY, },
+                            },
                .nb_stages = 8,
                .max_width = 2560,
                .max_height = 0xFFFF,
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
index b1c7daaede86b6b25c9ee81ca866618f355f95b4..75910d0f2f4c78e94111c6b8409774647f7ebfe2 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
@@ -39,8 +39,16 @@ struct mdp5_sub_block {
        MDP5_SUB_BLOCK_DEFINITION;
 };
 
+struct mdp5_lm_instance {
+       int id;
+       int pp;
+       int dspp;
+       uint32_t caps;
+};
+
 struct mdp5_lm_block {
        MDP5_SUB_BLOCK_DEFINITION;
+       struct mdp5_lm_instance instances[MAX_BASES];
        uint32_t nb_stages;             /* number of stages per blender */
        uint32_t max_width;             /* Maximum output resolution */
        uint32_t max_height;
diff --git a/drivers/gpu/drm/msm/mdp/mdp_kms.h b/drivers/gpu/drm/msm/mdp/mdp_kms.h
index 7574cdfef418b67ed391db377dc36621c0f93ea1..bf4db664ee86523db78c49ea822e17ba5d627e3b 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp_kms.h
+++ b/drivers/gpu/drm/msm/mdp/mdp_kms.h
@@ -114,6 +114,10 @@ const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format);
 #define MDP_PIPE_CAP_SW_PIX_EXT                        BIT(5)
 #define MDP_PIPE_CAP_CURSOR                    BIT(6)
 
+/* MDP layer mixer caps */
+#define MDP_LM_CAP_DISPLAY                     BIT(0)
+#define MDP_LM_CAP_WB                          BIT(1)
+
 static inline bool pipe_supports_yuv(uint32_t pipe_caps)
 {
        return (pipe_caps & MDP_PIPE_CAP_SCALE) &&