ARM: S5PV310: Adds enable and ctrlbit for clk_vpllsrc

This patch adds enable and ctrlbit for struct clksrc_clk clk_vpllsrc

Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c
index 2c9424f9dfada599c7ee03e5af6dc889ebb25010..a0bcd9f3bb8f61dd477b515872b7a47f89ac51d8 100644 (file)
--- a/arch/arm/mach-s5pv310/clock.c
+++ b/arch/arm/mach-s5pv310/clock.c
@@ -46,6 +46,11 @@ static struct clk clk_sclk_usbphy1 = {
        .id             = -1,
 };
 
+static int s5pv310_clksrc_mask_top_ctrl(struct clk *clk, int enable)
+{
+       return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable);
+}
+
 static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable)
 {
        return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable);
@@ -298,6 +303,8 @@ static struct clksrc_clk clk_vpllsrc = {
        .clk    = {
                .name           = "vpll_src",
                .id             = -1,
+               .enable         = s5pv310_clksrc_mask_top_ctrl,
+               .ctrlbit        = (1 << 0),
        },
        .sources        = &clkset_vpllsrc,
        .reg_src        = { .reg = S5P_CLKSRC_TOP1, .shift = 0, .size = 1 },