clk: tegra: Fix hda2codec_2x clock name for Tegra30
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Fri, 10 Apr 2015 21:35:57 +0000 (23:35 +0200)
committerThierry Reding <treding@nvidia.com>
Wed, 13 May 2015 13:17:14 +0000 (15:17 +0200)
The HDA to codec clock is named hda2codec_2x, so use the proper name in
the clock table.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra30.c

index 4b26509fc21857ede7ea3c41ed79d4fad3175c8f..0af3e834dd24a25d3e3e0cbfa020c596d57bc908 100644 (file)
@@ -679,7 +679,7 @@ static struct tegra_devclk devclks[] __initdata = {
        { .dev_id = "tegra30-dam.1", .dt_id = TEGRA30_CLK_DAM1 },
        { .dev_id = "tegra30-dam.2", .dt_id = TEGRA30_CLK_DAM2 },
        { .con_id = "hda", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA },
-       { .con_id = "hda2codec", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA2CODEC_2X },
+       { .con_id = "hda2codec_2x", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA2CODEC_2X },
        { .dev_id = "spi_tegra.0", .dt_id = TEGRA30_CLK_SBC1 },
        { .dev_id = "spi_tegra.1", .dt_id = TEGRA30_CLK_SBC2 },
        { .dev_id = "spi_tegra.2", .dt_id = TEGRA30_CLK_SBC3 },