x86/boot: Detect 5-level paging support

In this initial implementation we force-require 5-level paging support
from the hardware, when compiled with CONFIG_X86_5LEVEL=y. (The kernel
will panic during boot on CPUs that don't support 5-level paging.)

We will implement boot-time switch between 4- and 5-level paging later.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20170330080731.65421-2-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c
index 4ad7d70e8739f638f7ff3ce6795c015a7048091c..8f0c4c9fc90433d83e6c82b7ba14d55370d3d267 100644 (file)
--- a/arch/x86/boot/cpucheck.c
+++ b/arch/x86/boot/cpucheck.c
@@ -44,6 +44,15 @@ static const u32 req_flags[NCAPINTS] =
        0, /* REQUIRED_MASK5 not implemented in this file */
        REQUIRED_MASK6,
        0, /* REQUIRED_MASK7 not implemented in this file */
+       0, /* REQUIRED_MASK8 not implemented in this file */
+       0, /* REQUIRED_MASK9 not implemented in this file */
+       0, /* REQUIRED_MASK10 not implemented in this file */
+       0, /* REQUIRED_MASK11 not implemented in this file */
+       0, /* REQUIRED_MASK12 not implemented in this file */
+       0, /* REQUIRED_MASK13 not implemented in this file */
+       0, /* REQUIRED_MASK14 not implemented in this file */
+       0, /* REQUIRED_MASK15 not implemented in this file */
+       REQUIRED_MASK16,
 };
 
 #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a))

diff --git a/arch/x86/boot/cpuflags.c b/arch/x86/boot/cpuflags.c
index 6687ab9532575bf1d52fac34809fb94a040613f7..9e77c23c242268482e413da37af5f1835780dc1f 100644 (file)
--- a/arch/x86/boot/cpuflags.c
+++ b/arch/x86/boot/cpuflags.c
@@ -70,16 +70,19 @@ int has_eflag(unsigned long mask)
 # define EBX_REG "=b"
 #endif
 
-static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d)
+static inline void cpuid_count(u32 id, u32 count,
+               u32 *a, u32 *b, u32 *c, u32 *d)
 {
        asm volatile(".ifnc %%ebx,%3 ; movl  %%ebx,%3 ; .endif  \n\t"
                     "cpuid                                     \n\t"
                     ".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif  \n\t"
                    : "=a" (*a), "=c" (*c), "=d" (*d), EBX_REG (*b)
-                   : "a" (id)
+                   : "a" (id), "c" (count)
        );
 }
 
+#define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d)
+
 void get_cpuflags(void)
 {
        u32 max_intel_level, max_amd_level;
@@ -108,6 +111,11 @@ void get_cpuflags(void)
                                cpu.model += ((tfms >> 16) & 0xf) << 4;
                }
 
+               if (max_intel_level >= 0x00000007) {
+                       cpuid_count(0x00000007, 0, &ignored, &ignored,
+                                       &cpu.flags[16], &ignored);
+               }
+
                cpuid(0x80000000, &max_amd_level, &ignored, &ignored,
                      &ignored);
 

diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 85599ad4d0247863cef655d02b9a4b3f83c77fb7..5dff775af7cd6456f7177d9ce5888ae78dc6bc10 100644 (file)
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -36,6 +36,12 @@
 # define DISABLE_OSPKE         (1<<(X86_FEATURE_OSPKE & 31))
 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
 
+#ifdef CONFIG_X86_5LEVEL
+# define DISABLE_LA57  0
+#else
+# define DISABLE_LA57  (1<<(X86_FEATURE_LA57 & 31))
+#endif
+
 /*
  * Make sure to add features to the correct mask
  */
@@ -55,7 +61,7 @@
 #define DISABLED_MASK13        0
 #define DISABLED_MASK14        0
 #define DISABLED_MASK15        0
-#define DISABLED_MASK16        (DISABLE_PKU|DISABLE_OSPKE)
+#define DISABLED_MASK16        (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57)
 #define DISABLED_MASK17        0
 #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
 

diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index fac9a5c0abe94b233b72b35bca8c7a665847b694..d91ba04dd00709b7e549ced791759c12cf70d5d0 100644 (file)
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -53,6 +53,12 @@
 # define NEED_MOVBE    0
 #endif
 
+#ifdef CONFIG_X86_5LEVEL
+# define NEED_LA57     (1<<(X86_FEATURE_LA57 & 31))
+#else
+# define NEED_LA57     0
+#endif
+
 #ifdef CONFIG_X86_64
 #ifdef CONFIG_PARAVIRT
 /* Paravirtualized systems may not have PSE or PGE available */
@@ -98,7 +104,7 @@
 #define REQUIRED_MASK13        0
 #define REQUIRED_MASK14        0
 #define REQUIRED_MASK15        0
-#define REQUIRED_MASK16        0
+#define REQUIRED_MASK16        (NEED_LA57)
 #define REQUIRED_MASK17        0
 #define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)