arm64: dts: marvell: use new binding for the system controller on ap806
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Wed, 31 May 2017 14:07:28 +0000 (16:07 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Sat, 17 Jun 2017 06:19:04 +0000 (08:19 +0200)
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes

Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm64/boot/dts/marvell/armada-ap806.dtsi

index 5d4f71f94b5bf8022562ca38f8b22e9bad0de0f3..ff1964d314defd0b2c4cc891e2ea6a131642733c 100644 (file)
                                #size-cells = <0>;
                                cell-index = <0>;
                                interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&ap_syscon 3>;
+                               clocks = <&ap_clk 3>;
                                status = "disabled";
                        };
 
                                #size-cells = <0>;
                                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                                timeout-ms = <1000>;
-                               clocks = <&ap_syscon 3>;
+                               clocks = <&ap_clk 3>;
                                status = "disabled";
                        };
 
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
-                               clocks = <&ap_syscon 3>;
+                               clocks = <&ap_clk 3>;
                                status = "disabled";
                        };
 
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
-                               clocks = <&ap_syscon 3>;
+                               clocks = <&ap_clk 3>;
                                status = "disabled";
 
                        };
                                reg = <0x6e0000 0x300>;
                                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                                clock-names = "core";
-                               clocks = <&ap_syscon 4>;
+                               clocks = <&ap_clk 4>;
                                dma-coherent;
                                marvell,xenon-phy-slow-mode;
                                status = "disabled";
                        };
 
                        ap_syscon: system-controller@6f4000 {
-                               compatible = "marvell,ap806-system-controller",
-                                            "syscon";
-                               #clock-cells = <1>;
+                               compatible = "syscon", "simple-mfd";
                                reg = <0x6f4000 0x1000>;
+
+                               ap_clk: clock {
+                                       compatible = "marvell,ap806-clock";
+                                       #clock-cells = <1>;
+                               };
                        };
                };
        };