Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 core platform updates from Ingo Molnar:
 "The main changes are:

   - Intel Atom platform updates.  (Andy Shevchenko)

   - modularity fixlets.  (Paul Gortmaker)

   - x86 platform clockevents driver updates for lguest, uv and Xen.
     (Viresh Kumar)

   - Microsoft Hyper-V TSC fixlet.  (Vitaly Kuznetsov)"

* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/platform: Make atom/pmc_atom.c explicitly non-modular
  x86/hyperv: Mark the Hyper-V TSC as unstable
  x86/xen/time: Migrate to new set-state interface
  x86/uv/time: Migrate to new set-state interface
  x86/lguest/timer: Migrate to new set-state interface
  x86/pci/intel_mid_pci: Use proper constants for irq polarity
  x86/pci/intel_mid_pci: Make intel_mid_pci_ops static
  x86/pci/intel_mid_pci: Propagate actual return code
  x86/pci/intel_mid_pci: Work around for IRQ0 assignment
  x86/platform/iosf_mbi: Add Intel Tangier PCI id
  x86/platform/iosf_mbi: Source cleanup
  x86/platform/iosf_mbi: Remove NULL pointer checks for pci_dev_put()
  x86/platform/iosf_mbi: Check return value of debugfs_create properly
  x86/platform/iosf_mbi: Move to dedicated folder
  x86/platform/intel/pmc_atom: Move the PMC-Atom code to arch/x86/platform/atom
  x86/platform/intel/pmc_atom: Add Cherrytrail PMC interface
  x86/platform/intel/pmc_atom: Supply register mappings via PMC object
  x86/platform/intel/pmc_atom: Print index of device in loop
  x86/platform/intel/pmc_atom: Export accessors to PMC registers

diff --cc arch/x86/kernel/Makefile
Simple merge

diff --cc arch/x86/kernel/cpu/mshyperv.c
index f794bfa3c1383c2d9ac1bb3c2ec384fb0d0db52c,6fd023d7492d83b90e1f970285b159e1b7abe0f1..381c8b9b3a33570fcf88b82fa69d1fc43298d89f
--- 1/arch/x86/kernel/cpu/mshyperv.c
--- 2/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@@ -186,8 -141,7 +186,9 @@@ static void __init ms_hyperv_init_platf
        no_timer_check = 1;
  #endif
  
 +      machine_ops.shutdown = hv_machine_shutdown;
 +      machine_ops.crash_shutdown = hv_machine_crash_shutdown;
+       mark_tsc_unstable("running on Hyper-V");
  }
  
  const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {

diff --cc arch/x86/pci/intel_mid_pci.c
index 22aaefb4f1cadf5bc136b4a72af08939fc4aae30,8b93e634af84c4698e6f7c6ab718a018e2cdc9db..0d24e7c101454057f432dd976ea7e3d537e0a38c
--- 1/arch/x86/pci/intel_mid_pci.c
--- 2/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@@ -210,14 -213,32 +213,32 @@@ static int intel_mid_pci_irq_enable(str
  {
        struct irq_alloc_info info;
        int polarity;
+       int ret;
  
 -      if (dev->irq_managed && dev->irq > 0)
 +      if (pci_has_managed_irq(dev))
                return 0;
  
-       if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
-               polarity = 0; /* active high */
-       else
-               polarity = 1; /* active low */
+       switch (intel_mid_identify_cpu()) {
+       case INTEL_MID_CPU_CHIP_TANGIER:
+               polarity = IOAPIC_POL_HIGH;
+ 
+               /* Special treatment for IRQ0 */
+               if (dev->irq == 0) {
+                       /*
+                        * TNG has IRQ0 assigned to eMMC controller. But there
+                        * are also other devices with bogus PCI configuration
+                        * that have IRQ0 assigned. This check ensures that
+                        * eMMC gets it.
+                        */
+                       if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC)
+                               return -EBUSY;
+               }
+               break;
+       default:
+               polarity = IOAPIC_POL_LOW;
+               break;
+       }
+ 
        ioapic_set_alloc_attr(&info, dev_to_node(&dev->dev), 1, polarity);
  
        /*