drm/i915: s/0x50/RING_PSMI_CTL/

Use the RING_PSMI_CTL define insted of hand rolling the register offset.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446672017-24497-17-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 27b6ac96b0aefc4f9d9d5abe94d424df0271842f..b3698d01bb16b673aa8e9ff39cd9a10cb03aaf6d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -873,7 +873,7 @@ static void i915_record_ring_state(struct drm_device *dev,
        struct drm_i915_private *dev_priv = dev->dev_private;
 
        if (INTEL_INFO(dev)->gen >= 6) {
-               ering->rc_psmi = I915_READ(ring->mmio_base + 0x50);
+               ering->rc_psmi = I915_READ(RING_PSMI_CTL(ring->mmio_base));
                ering->fault_reg = I915_READ(RING_FAULT_REG(ring));
                if (INTEL_INFO(dev)->gen >= 8)
                        gen8_record_semaphore_state(dev_priv, error, ring, ering);