Code cleanup. Removed unused references.
Signed-off-by: Roland Vossen <rvossen@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
pio4regp_t b4; /* >= corerev 8 */
} u_pioreg_t;
-/* dma/pio corerev < 11 */
-typedef volatile struct {
- dma32regp_t dmaregs[8]; /* 0x200 - 0x2fc */
- u_pioreg_t pioregs[8]; /* 0x300 */
-} fifo32_t;
-
/* dma/pio corerev >= 11 */
typedef volatile struct {
dma64regs_t dmaxmt; /* dma tx */
/* 0x200-0x37F dma/pio registers */
volatile union {
- fifo32_t f32regs; /* tx fifos 6-7 and rx fifos 1-3 (corerev < 5) */
fifo64_t f64regs[6]; /* on corerev >= 11 */
} fifo;
#endif /* BMAC_DUP_TO_REMOVE */
-#define DMAREG(wlc_hw, direction, fifonum) (D11REV_LT(wlc_hw->corerev, 11) ? \
- ((direction == DMA_TX) ? \
- (void *)&(wlc_hw->regs->fifo.f32regs.dmaregs[fifonum].xmt) : \
- (void *)&(wlc_hw->regs->fifo.f32regs.dmaregs[fifonum].rcv)) : \
+#define DMAREG(wlc_hw, direction, fifonum) \
((direction == DMA_TX) ? \
(void *)&(wlc_hw->regs->fifo.f64regs[fifonum].dmaxmt) : \
- (void *)&(wlc_hw->regs->fifo.f64regs[fifonum].dmarcv)))
+ (void *)&(wlc_hw->regs->fifo.f64regs[fifonum].dmarcv))
/*
* The following table lists the buffer memory allocated to xmt fifos in HW.
*/
extern uint dma_addrwidth(si_t *sih, void *dmaregs);
-/* pio helpers */
-extern void dma_txpioloopback(struct osl_info *osh, dma32regs_t *);
-
#endif /* _hnddma_h_ */
#define DMA_NONE(args)
-#define d32txregs dregs.d32_u.txregs_32
-#define d32rxregs dregs.d32_u.rxregs_32
-#define txd32 dregs.d32_u.txd_32
-#define rxd32 dregs.d32_u.rxd_32
-
#define d64txregs dregs.d64_u.txregs_64
#define d64rxregs dregs.d64_u.rxregs_64
#define txd64 dregs.d64_u.txd_64
bool addrext; /* this dma engine supports DmaExtendedAddrChanges */
union {
- struct {
- dma32regs_t *txregs_32; /* 32-bit dma tx engine registers */
- dma32regs_t *rxregs_32; /* 32-bit dma rx engine registers */
- dma32dd_t *txd_32; /* pointer to dma32 tx descriptor ring */
- dma32dd_t *rxd_32; /* pointer to dma32 rx descriptor ring */
- } d32_u;
struct {
dma64regs_t *txregs_64; /* 64-bit dma tx engine registers */
dma64regs_t *rxregs_64; /* 64-bit dma rx engine registers */