ARM: mvebu: add crypto related nodes to armada 375 dtsi
authorBoris Brezillon <boris.brezillon@free-electrons.com>
Tue, 18 Aug 2015 08:08:56 +0000 (10:08 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Tue, 29 Sep 2015 14:19:11 +0000 (16:19 +0200)
Add crypto related nodes in armada-375.dtsi.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm/boot/dts/armada-375.dtsi

index e9a381741ce12e2eba5108aebf9517e6a4a1aa6c..7ccce7529b0c8debe46f6d4d28c9d51b143738cf 100644 (file)
                                };
                        };
 
+                       crypto@90000 {
+                               compatible = "marvell,armada-375-crypto";
+                               reg = <0x90000 0x10000>;
+                               reg-names = "regs";
+                               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gateclk 30>, <&gateclk 31>,
+                                        <&gateclk 28>, <&gateclk 29>;
+                               clock-names = "cesa0", "cesa1",
+                                             "cesaz0", "cesaz1";
+                               marvell,crypto-srams = <&crypto_sram0>,
+                                                      <&crypto_sram1>;
+                               marvell,crypto-sram-size = <0x800>;
+                       };
+
                        sata@a0000 {
                                compatible = "marvell,orion-sata";
                                reg = <0xa0000 0x5000>;
                        };
 
                };
+
+               crypto_sram0: sa-sram0 {
+                       compatible = "mmio-sram";
+                       reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
+                       clocks = <&gateclk 30>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
+               };
+
+               crypto_sram1: sa-sram1 {
+                       compatible = "mmio-sram";
+                       reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
+                       clocks = <&gateclk 31>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
+               };
        };
 };