drm/amd/amdgpu: Clean up gfx_v8_0_inactive_hqd()
authorTom St Denis <tom.stdenis@amd.com>
Tue, 4 Apr 2017 13:27:28 +0000 (09:27 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 6 Apr 2017 17:26:48 +0000 (13:26 -0400)
Swap read/write pattern for WREG32_FIELD()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index 8f30189e8a2a310b4a2df981781c12314fb88326..e1d36f6e8e676a1a1e2b84b4684a1e8327dbf0c5 100644 (file)
@@ -5474,11 +5474,7 @@ static void gfx_v8_0_inactive_hqd(struct amdgpu_device *adev,
 
        vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
        if (RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK) {
-               u32 tmp;
-               tmp = RREG32(mmCP_HQD_DEQUEUE_REQUEST);
-               tmp = REG_SET_FIELD(tmp, CP_HQD_DEQUEUE_REQUEST,
-                                   DEQUEUE_REQ, 2);
-               WREG32(mmCP_HQD_DEQUEUE_REQUEST, tmp);
+               WREG32_FIELD(CP_HQD_DEQUEUE_REQUEST, DEQUEUE_REQ, 2);
                for (i = 0; i < adev->usec_timeout; i++) {
                        if (!(RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK))
                                break;