ASoC: rockchip: i2s: rename I2S_CKR_TRCM_TX/RXSHARE to I2S_CKR_TRCM_TX/RXONLY
authorSugar Zhang <sugar.zhang@rock-chips.com>
Tue, 24 May 2016 03:47:46 +0000 (11:47 +0800)
committerMark Brown <broonie@kernel.org>
Mon, 30 May 2016 15:19:41 +0000 (16:19 +0100)
this patch make it more reasonable and readable, because when we chose
I2S_CKR_TRCM_TXONLY, we only output clk_lrck_tx, and hardware need to
confirm this signal is wired to external codec lrck_tx/rx at the same time.

for convenience, we just handle lrck_txonly if we enable symmetric_rates
in driver and dai_link. otherwise, we use the separate lrck_tx/rx.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/rockchip/rockchip_i2s.c
sound/soc/rockchip/rockchip_i2s.h

index 2f290f3a0ac7b3c74698f01c645512c250a57518..652e8c5ea1667185f6bb191a2cc8a3714cd74c1b 100644 (file)
@@ -339,8 +339,8 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
                           I2S_DMACR_RDL(16));
 
        val = I2S_CKR_TRCM_TXRX;
-       if (dai->driver->symmetric_rates || rtd->dai_link->symmetric_rates)
-               val = I2S_CKR_TRCM_TXSHARE;
+       if (dai->driver->symmetric_rates && rtd->dai_link->symmetric_rates)
+               val = I2S_CKR_TRCM_TXONLY;
 
        regmap_update_bits(i2s->regmap, I2S_CKR,
                           I2S_CKR_TRCM_MASK,
index 8e239d301bc7cbba1c320cd47c7dc08e7cfefd6c..31f11fd25393ac37d0a696bdc3e5de5b37150590 100644 (file)
@@ -81,8 +81,8 @@
 #define I2S_CKR_TRCM_SHIFT     28
 #define I2S_CKR_TRCM(x)        (x << I2S_CKR_TRCM_SHIFT)
 #define I2S_CKR_TRCM_TXRX      (0 << I2S_CKR_TRCM_SHIFT)
-#define I2S_CKR_TRCM_TXSHARE   (1 << I2S_CKR_TRCM_SHIFT)
-#define I2S_CKR_TRCM_RXSHARE   (2 << I2S_CKR_TRCM_SHIFT)
+#define I2S_CKR_TRCM_TXONLY    (1 << I2S_CKR_TRCM_SHIFT)
+#define I2S_CKR_TRCM_RXONLY    (2 << I2S_CKR_TRCM_SHIFT)
 #define I2S_CKR_TRCM_MASK      (3 << I2S_CKR_TRCM_SHIFT)
 #define I2S_CKR_MSS_SHIFT      27
 #define I2S_CKR_MSS_MASTER     (0 << I2S_CKR_MSS_SHIFT)