drm/radeon/kms: leave certain CP int bits enabled
authorAlex Deucher <alexdeucher@gmail.com>
Fri, 8 Oct 2010 16:09:12 +0000 (12:09 -0400)
committerDave Airlie <airlied@redhat.com>
Tue, 12 Oct 2010 10:18:04 +0000 (20:18 +1000)
These bits are used for internal communication and should
be left enabled.  This may fix s/r issues on some systems.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/r600.c

index 315e1341a942d89cbade6e514008990963e9f94b..a90f0c03b838c98edf2a49333b20fdad5754b924 100644 (file)
@@ -1521,7 +1521,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev)
 {
        u32 tmp;
 
-       WREG32(CP_INT_CNTL, 0);
+       WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);
        WREG32(GRBM_INT_CNTL, 0);
        WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
        WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
index ba05d3e7d1454b2a78ac28cc31531942a40770d6..7b65e4efe8af61e2df5404ea52c468fe8ee564db 100644 (file)
@@ -2912,7 +2912,7 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev)
 {
        u32 tmp;
 
-       WREG32(CP_INT_CNTL, 0);
+       WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);
        WREG32(GRBM_INT_CNTL, 0);
        WREG32(DxMODE_INT_MASK, 0);
        if (ASIC_IS_DCE3(rdev)) {