Merge remote branch 'origin/master' into drm-intel-next

Conflicts:
	drivers/gpu/drm/i915/i915_dma.c
	drivers/gpu/drm/i915/i915_drv.h
	drivers/gpu/drm/radeon/r300.c

The BSD ringbuffer support that is landing in this branch
significantly conflicts with the Ironlake PIPE_CONTROL fix on master,
and requires it to be tested successfully anyway.

diff --cc drivers/gpu/drm/drm_sysfs.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_dma.c
index bf7d601fc37d6c56fa569efe089e6ba7e4f3c7b0,c3cfafcbfe7d5ada4b3ee7f9683e4bf809a5ad0f..851a2f8ed6e650b5ff2ac376bc829220e9aad6ba
--- 1/drivers/gpu/drm/i915/i915_dma.c
--- 2/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1357,12 -1357,16 +1357,15 @@@ static void i915_setup_compression(stru
  
        dev_priv->cfb_size = size;
  
 +      intel_disable_fbc(dev);
+       dev_priv->compressed_fb = compressed_fb;
+ 
        if (IS_GM45(dev)) {
 -              g4x_disable_fbc(dev);
                I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
        } else {
 -              i8xx_disable_fbc(dev);
                I915_WRITE(FBC_CFB_BASE, cfb_base);
                I915_WRITE(FBC_LL_BASE, ll_base);
+               dev_priv->compressed_llb = compressed_llb;
        }
  
        DRM_DEBUG("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base,

diff --cc drivers/gpu/drm/i915/i915_drv.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_drv.h
index c06d203b709b3b78b26317ede9b8e34c76a078d9,6e4790065d9e0ba506d4a3c74aec326808650294..bf11ad9998db705822f9f5212fd1ae876288330f
--- 1/drivers/gpu/drm/i915/i915_drv.h
--- 2/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -641,8 -635,8 +645,11 @@@ typedef struct drm_i915_private 
  
        enum no_fbc_reason no_fbc_reason;
  
+       struct drm_mm_node *compressed_fb;
+       struct drm_mm_node *compressed_llb;
++
 +      /* list of fbdev register on this device */
 +      struct intel_fbdev *fbdev;
  } drm_i915_private_t;
  
  /** driver private structure attached to each drm_gem_object */
@@@ -1157,10 -1142,8 +1164,11 @@@ extern int i915_wait_ring(struct drm_de
  
  #define HAS_PCH_SPLIT(dev) (IS_IRONLAKE(dev) ||       \
                            IS_GEN6(dev))
+ #define HAS_PIPE_CONTROL(dev) (IS_IRONLAKE(dev) || IS_GEN6(dev))
  
 +#define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
 +#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
 +
  #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
  
  #endif

diff --cc drivers/gpu/drm/i915/i915_gem.c
index 3471dece13e7c48bfd03b6bf1fe10f87bfb09186,ef3d91dda71a9a8a0ce0e1ab61a9731afed1f5f8..666d75570502a78a332609bbfcb56a2c0a142f9f
--- 1/drivers/gpu/drm/i915/i915_gem.c
--- 2/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@@ -4554,6 -4596,49 +4604,49 @@@ i915_gem_idle(struct drm_device *dev
        return 0;
  }
  
 -      obj = drm_gem_object_alloc(dev, 4096);
+ /*
+  * 965+ support PIPE_CONTROL commands, which provide finer grained control
+  * over cache flushing.
+  */
+ static int
+ i915_gem_init_pipe_control(struct drm_device *dev)
+ {
+       drm_i915_private_t *dev_priv = dev->dev_private;
+       struct drm_gem_object *obj;
+       struct drm_i915_gem_object *obj_priv;
+       int ret;
+ 
++      obj = i915_gem_alloc_object(dev, 4096);
+       if (obj == NULL) {
+               DRM_ERROR("Failed to allocate seqno page\n");
+               ret = -ENOMEM;
+               goto err;
+       }
+       obj_priv = to_intel_bo(obj);
+       obj_priv->agp_type = AGP_USER_CACHED_MEMORY;
+ 
+       ret = i915_gem_object_pin(obj, 4096);
+       if (ret)
+               goto err_unref;
+ 
+       dev_priv->seqno_gfx_addr = obj_priv->gtt_offset;
+       dev_priv->seqno_page =  kmap(obj_priv->pages[0]);
+       if (dev_priv->seqno_page == NULL)
+               goto err_unpin;
+ 
+       dev_priv->seqno_obj = obj;
+       memset(dev_priv->seqno_page, 0, PAGE_SIZE);
+ 
+       return 0;
+ 
+ err_unpin:
+       i915_gem_object_unpin(obj);
+ err_unref:
+       drm_gem_object_unreference(obj);
+ err:
+       return ret;
+ }
+ 
  static int
  i915_gem_init_hws(struct drm_device *dev)
  {
@@@ -4568,10 -4653,11 +4661,11 @@@
        if (!I915_NEED_GFX_HWS(dev))
                return 0;
  
 -      obj = drm_gem_object_alloc(dev, 4096);
 +      obj = i915_gem_alloc_object(dev, 4096);
        if (obj == NULL) {
                DRM_ERROR("Failed to allocate status page\n");
-               return -ENOMEM;
+               ret = -ENOMEM;
+               goto err;
        }
        obj_priv = to_intel_bo(obj);
        obj_priv->agp_type = AGP_USER_CACHED_MEMORY;

diff --cc drivers/gpu/drm/i915/i915_irq.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_reg.h
Simple merge

diff --cc drivers/gpu/drm/i915/intel_display.c
Simple merge

diff --cc drivers/gpu/drm/radeon/atombios.h
Simple merge

diff --cc drivers/gpu/drm/radeon/r100.c
Simple merge

diff --cc drivers/gpu/drm/radeon/r300.c
index 5d622cb39b331203700aaadc1cdd7c6bece23277,a5ff8076b423bb477a38bc224bc6d14340a03c24..6d9569e002f7c8c74c691b2ccee9be0368731a4e
--- 1/drivers/gpu/drm/radeon/r300.c
--- 2/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@@ -328,9 -323,9 +328,8 @@@ void r300_gpu_init(struct radeon_devic
  {
        uint32_t gb_tile_config, tmp;
  
-       /* FIXME: rv380 one pipes ? */
 -      r100_hdp_reset(rdev);
        if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||
-           (rdev->family == CHIP_R350)) {
+           (rdev->family == CHIP_R350 && rdev->pdev->device != 0x4148)) {
                /* r300,r350 */
                rdev->num_gb_pipes = 2;
        } else {

diff --cc drivers/gpu/drm/radeon/r420.c
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon_atombios.c
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon_connectors.c
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon_display.c
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon_mode.h
Simple merge