ath9k: Fix Carrier Leak calibration for SoC chips

CL calibration is applicable for all chips and the
enable/disable knob comes via the INI file. For PCOEM
chips, the calibration data is reused when Fast Channel Change
is used. Caldata reuse is not enabled for SoC chips, so remove
the CL post processing code.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index 347b002938ed61bee1cc0e7e764a6edfc431765a..58eacf12db83ee8cf6a910d41d26ff49e614e66e 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -1236,20 +1236,13 @@ static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
        bool txiqcal_done = false;
        bool is_reusable = true, status = true;
        bool run_agc_cal = false, sep_iq_cal = false;
-       u32 rx_delay = 0;
 
        /* Use chip chainmask only for calibration */
        ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
 
        if (ah->enabled_cals & TX_CL_CAL) {
-               if (caldata && test_bit(TXCLCAL_DONE, &caldata->cal_flags))
-                       REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL,
-                                   AR_PHY_CL_CAL_ENABLE);
-               else {
-                       REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL,
-                                   AR_PHY_CL_CAL_ENABLE);
-                       run_agc_cal = true;
-               }
+               REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
+               run_agc_cal = true;
        }
 
        if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))
@@ -1285,15 +1278,6 @@ skip_tx_iqcal:
                REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
        }
 
-       if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
-               rx_delay = REG_READ(ah, AR_PHY_RX_DELAY);
-               /* Disable BB_active */
-               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
-               udelay(5);
-               REG_WRITE(ah, AR_PHY_RX_DELAY, AR_PHY_RX_DELAY_DELAY);
-               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
-       }
-
        if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
                /* Calibrate the AGC */
                REG_WRITE(ah, AR_PHY_AGC_CONTROL,
@@ -1306,11 +1290,6 @@ skip_tx_iqcal:
                                       0, AH_WAIT_TIMEOUT);
        }
 
-       if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
-               REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay);
-               udelay(5);
-       }
-
        if (!status) {
                ath_dbg(common, CALIBRATE,
                        "offset calibration failed to complete in %d ms; noisy environment?\n",
@@ -1323,8 +1302,6 @@ skip_tx_iqcal:
        else if (caldata && test_bit(TXIQCAL_DONE, &caldata->cal_flags))
                ar9003_hw_tx_iq_cal_reload(ah);
 
-       ar9003_hw_cl_cal_post_proc(ah, is_reusable);
-
        /* Revert chainmask to runtime parameters */
        ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
 

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index d39b79f5e841ada25c0e1bf435e7c7fd926c15ea..39b71b3d6919da5e59fcaa772f53aaf007ba870f 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -641,11 +641,12 @@ static void ar9003_hw_override_ini(struct ath_hw *ah)
                else
                        ah->enabled_cals &= ~TX_IQ_CAL;
 
-               if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
-                       ah->enabled_cals |= TX_CL_CAL;
-               else
-                       ah->enabled_cals &= ~TX_CL_CAL;
        }
+
+       if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
+               ah->enabled_cals |= TX_CL_CAL;
+       else
+               ah->enabled_cals &= ~TX_CL_CAL;
 }
 
 static void ar9003_hw_prog_ini(struct ath_hw *ah,