pata_bf54x: handle portmuxing of pins through GPIO PORTs
authorSonic Zhang <sonic.zhang@analog.com>
Tue, 14 Jul 2009 17:39:47 +0000 (13:39 -0400)
committerJeff Garzik <jgarzik@redhat.com>
Mon, 21 Dec 2009 18:55:38 +0000 (13:55 -0500)
By default, the PATA pins are routed to the async address lines in which
case, no peripheral muxing needs to be done.  However, if the pins get
routed through the GPIO PORTs pins, we need to make sure to request them
so that the muxing is properly set up.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
drivers/ata/pata_bf54x.c

index c4b47a3e5446decec4543b37c08c75b58cc378e8..02c81f12c702a7a02546a595937ae353c7a3290d 100644 (file)
@@ -1557,6 +1557,25 @@ static unsigned short atapi_io_port[] = {
        P_ATAPI_DMARQ,
        P_ATAPI_INTRQ,
        P_ATAPI_IORDY,
+       P_ATAPI_D0A,
+       P_ATAPI_D1A,
+       P_ATAPI_D2A,
+       P_ATAPI_D3A,
+       P_ATAPI_D4A,
+       P_ATAPI_D5A,
+       P_ATAPI_D6A,
+       P_ATAPI_D7A,
+       P_ATAPI_D8A,
+       P_ATAPI_D9A,
+       P_ATAPI_D10A,
+       P_ATAPI_D11A,
+       P_ATAPI_D12A,
+       P_ATAPI_D13A,
+       P_ATAPI_D14A,
+       P_ATAPI_D15A,
+       P_ATAPI_A0A,
+       P_ATAPI_A1A,
+       P_ATAPI_A2A,
        0
 };