Drive strength for PXA910 is a 2 bit value but because of the mapping in
plat-pxa/mfp.h needs to be shifted up one bit to handle real
location in mfp registers. (MMP2 and PXA910 drive strength start
at bit 11 while PXA168 starts at bit 10).
Values 0, 1, 2, and 3 effectively need to be
0, 2, 4, and 6 to fit into register. 8 does not work.
Signed-off-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x8 << 13)
+#define MFP_DRIVE_FAST (0x6 << 13)
/* UART2 */
#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)