dt-bindings: interrupt-controller: add DT binding for Marvell 7K/8K PIC
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fri, 5 Aug 2016 14:55:18 +0000 (16:55 +0200)
committerJason Cooper <jason@lakedaemon.net>
Tue, 16 Aug 2016 13:59:04 +0000 (13:59 +0000)
This commit adds the Device Tree binding description for the PIC
interrupt controller available in the ARM64 Marvell Armada 7K/8K SoCs.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1470408921-447-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt
new file mode 100644 (file)
index 0000000..86a7b4c
--- /dev/null
@@ -0,0 +1,25 @@
+Marvell Armada 7K/8K PIC Interrupt controller
+---------------------------------------------
+
+This is the Device Tree binding for the PIC, a secondary interrupt
+controller available on the Marvell Armada 7K/8K ARM64 SoCs, and
+typically connected to the GIC as the primary interrupt controller.
+
+Required properties:
+- compatible: should be "marvell,armada-8k-pic"
+- interrupt-controller: identifies the node as an interrupt controller
+- #interrupt-cells: the number of cells to define interrupts on this
+  controller. Should be 1
+- reg: the register area for the PIC interrupt controller
+- interrupts: the interrupt to the primary interrupt controller,
+  typically the GIC
+
+Example:
+
+       pic: interrupt-controller@3f0100 {
+               compatible = "marvell,armada-8k-pic";
+               reg = <0x3f0100 0x10>;
+               #interrupt-cells = <1>;
+               interrupt-controller;
+               interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
+       };