drm/nouveau/mc/gk104: define reset masks + intr cleanup
authorBen Skeggs <bskeggs@redhat.com>
Fri, 8 Apr 2016 07:24:40 +0000 (17:24 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 20 May 2016 04:43:04 +0000 (14:43 +1000)
Engine fields have been removed, as they're specified by PTOP.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h

index ac6321f1b6e8c562df3ec519d132655d8fdf5595..bd85dc8df2290a03a02620b38b81585df3aa15a0 100644 (file)
@@ -18,5 +18,6 @@ int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int g98_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gf100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
+int gk104_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gk20a_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 #endif
index 65d4ab9a8cb8f6f5334492fc445f8ee9968e21b8..2c735182cceda19f038b685f8f7523c40b1969b4 100644 (file)
@@ -1676,7 +1676,7 @@ nve4_chipset = {
        .iccsense = gf100_iccsense_new,
        .imem = nv50_instmem_new,
        .ltc = gk104_ltc_new,
-       .mc = gf100_mc_new,
+       .mc = gk104_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = gk104_pci_new,
@@ -1715,7 +1715,7 @@ nve6_chipset = {
        .iccsense = gf100_iccsense_new,
        .imem = nv50_instmem_new,
        .ltc = gk104_ltc_new,
-       .mc = gf100_mc_new,
+       .mc = gk104_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = gk104_pci_new,
@@ -1754,7 +1754,7 @@ nve7_chipset = {
        .iccsense = gf100_iccsense_new,
        .imem = nv50_instmem_new,
        .ltc = gk104_ltc_new,
-       .mc = gf100_mc_new,
+       .mc = gk104_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = gk104_pci_new,
@@ -1818,7 +1818,7 @@ nvf0_chipset = {
        .iccsense = gf100_iccsense_new,
        .imem = nv50_instmem_new,
        .ltc = gk104_ltc_new,
-       .mc = gf100_mc_new,
+       .mc = gk104_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = gk104_pci_new,
@@ -1856,7 +1856,7 @@ nvf1_chipset = {
        .iccsense = gf100_iccsense_new,
        .imem = nv50_instmem_new,
        .ltc = gk104_ltc_new,
-       .mc = gf100_mc_new,
+       .mc = gk104_mc_new,
        .mmu = gf100_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = gk104_pci_new,
index bef325dcb4d001c02a8c161edca772cff86347d5..d89da5ea7dd86667c592669ca95eba3a0c6b95aa 100644 (file)
@@ -4,4 +4,5 @@ nvkm-y += nvkm/subdev/mc/nv44.o
 nvkm-y += nvkm/subdev/mc/nv50.o
 nvkm-y += nvkm/subdev/mc/g98.o
 nvkm-y += nvkm/subdev/mc/gf100.o
+nvkm-y += nvkm/subdev/mc/gk104.o
 nvkm-y += nvkm/subdev/mc/gk20a.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c
new file mode 100644 (file)
index 0000000..3174642
--- /dev/null
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+
+const struct nvkm_mc_map
+gk104_mc_reset[] = {
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       {}
+};
+
+const struct nvkm_mc_map
+gk104_mc_intr[] = {
+       { 0x04000000, NVKM_ENGINE_DISP },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x40000000, NVKM_SUBDEV_IBUS },
+       { 0x10000000, NVKM_SUBDEV_BUS },
+       { 0x08000000, NVKM_SUBDEV_FB },
+       { 0x02000000, NVKM_SUBDEV_LTC },
+       { 0x01000000, NVKM_SUBDEV_PMU },
+       { 0x00200000, NVKM_SUBDEV_GPIO },
+       { 0x00200000, NVKM_SUBDEV_I2C },
+       { 0x00100000, NVKM_SUBDEV_TIMER },
+       { 0x00040000, NVKM_SUBDEV_THERM },
+       { 0x00002000, NVKM_SUBDEV_FB },
+       {},
+};
+
+static const struct nvkm_mc_func
+gk104_mc = {
+       .init = nv50_mc_init,
+       .intr = gk104_mc_intr,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
+       .reset = gk104_mc_reset,
+       .unk260 = gf100_mc_unk260,
+};
+
+int
+gk104_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       return nvkm_mc_new_(&gk104_mc, device, index, pmc);
+}
index d92efb33bcc3ce0039ff9a24b3252b5dc9bc05cf..60b044f517ed5d70aec8d8f424322edf4afd821a 100644 (file)
 static const struct nvkm_mc_func
 gk20a_mc = {
        .init = nv50_mc_init,
-       .intr = gf100_mc_intr,
+       .intr = gk104_mc_intr,
        .intr_unarm = gf100_mc_intr_unarm,
        .intr_rearm = gf100_mc_intr_rearm,
        .intr_mask = gf100_mc_intr_mask,
+       .reset = gk104_mc_reset,
 };
 
 int
index b80385b438b3df8a44ab367bdebe9c71d04f015e..07707ea54f819923054e404042d9eefb49bfc3fe 100644 (file)
@@ -40,4 +40,7 @@ void gf100_mc_intr_unarm(struct nvkm_mc *);
 void gf100_mc_intr_rearm(struct nvkm_mc *);
 u32 gf100_mc_intr_mask(struct nvkm_mc *);
 void gf100_mc_unk260(struct nvkm_mc *, u32);
+
+extern const struct nvkm_mc_map gk104_mc_intr[];
+extern const struct nvkm_mc_map gk104_mc_reset[];
 #endif