osd: update osd freescaler reg every hwc cmd [1/1]
authorPengcheng Chen <pengcheng.chen@amlogic.com>
Tue, 26 Nov 2019 06:25:12 +0000 (14:25 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 9 Dec 2019 12:12:01 +0000 (05:12 -0700)
PD#SWPL-17309

Problem:
do switch resolution test, sc regs miss-set caused display garbage

Solution:
update osd freescaler reg every hwc cmd

Verify:
ac214

Change-Id: I4c09094a477442b6f9f7bd782f9360d98eff299c
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
(cherry picked from commit 7f7f09a1d6e305b1e9f219f5441e0844b39e7ac7)

drivers/amlogic/media/osd/osd_hw.c

index 68e07d6f750881ea14de7298ee117733331b3d5c..66c6b5d4c64727c2eac719390cce32d9f798fc12 100644 (file)
@@ -6381,6 +6381,7 @@ static void generate_blend_din_table(struct hw_osd_blending_s *blending)
                blending->din_reoder_sel;
 }
 
+#ifdef FREESCAL_CHECK
 static bool is_freescale_para_changed(u32 index)
 {
        static int first[HW_OSD_COUNT - 1] = {1};
@@ -6405,6 +6406,7 @@ static bool is_freescale_para_changed(u32 index)
        first[index] = 0;
        return freescale_update;
 }
+#endif
 
 static int osd_setting_blending_scope(u32 index)
 {
@@ -8582,7 +8584,7 @@ static int osd_setting_order(u32 output_index)
                if (osd_hw.enable[i]) {
                        struct hw_osd_reg_s *osd_reg = &hw_osd_reg_array[i];
 
-                       update = is_freescale_para_changed(i);
+                       /* update = is_freescale_para_changed(i); */
                        if (!osd_hw.osd_afbcd[i].enable)
                                canvas_config(osd_hw.fb_gem[i].canvas_idx,
                                        osd_hw.fb_gem[i].addr,
@@ -8620,10 +8622,10 @@ static int osd_setting_order(u32 output_index)
                        osd_hw.reg[OSD_FREESCALE_COEF].update_func(i);
                        if (update || osd_update_window_axis) {
                                osd_set_scan_mode(i);
-                               osd_hw.reg[DISP_FREESCALE_ENABLE]
-                               .update_func(i);
                                osd_update_window_axis = false;
                        }
+                       osd_hw.reg[DISP_FREESCALE_ENABLE]
+                               .update_func(i);
                        if (osd_hw.premult_en[i] && !osd_hw.blend_bypass)
                                VSYNCOSD_WR_MPEG_REG_BITS(
                                osd_reg->osd_mali_unpack_ctrl, 0x1, 28, 1);