drm/amdgpu: Add support for filling a buffer with 64 bit value
authorYong Zhao <Yong.Zhao@amd.com>
Thu, 20 Jul 2017 22:44:10 +0000 (18:44 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Aug 2017 18:45:44 +0000 (14:45 -0400)
That function will be used later to support setting a page table
block with 64 bit value.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

index e6f9a54c959ddff1413ee4f212373bfb2d88a545..24c414630e655979d33f54914fb42398f8e60ea3 100644 (file)
@@ -1509,11 +1509,12 @@ error_free:
 }
 
 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
-                      uint32_t src_data,
+                      uint64_t src_data,
                       struct reservation_object *resv,
                       struct dma_fence **fence)
 {
        struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+       /* max_bytes applies to SDMA_OP_PTEPDE as well as SDMA_OP_CONST_FILL*/
        uint32_t max_bytes = adev->mman.buffer_funcs->fill_max_bytes;
        struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
 
@@ -1545,7 +1546,9 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
                num_pages -= mm_node->size;
                ++mm_node;
        }
-       num_dw = num_loops * adev->mman.buffer_funcs->fill_num_dw;
+
+       /* 10 double words for each SDMA_OP_PTEPDE cmd */
+       num_dw = num_loops * 10;
 
        /* for IB padding */
        num_dw += 64;
@@ -1570,12 +1573,16 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
                uint32_t byte_count = mm_node->size << PAGE_SHIFT;
                uint64_t dst_addr;
 
+               WARN_ONCE(byte_count & 0x7, "size should be a multiple of 8");
+
                dst_addr = amdgpu_mm_node_addr(&bo->tbo, mm_node, &bo->tbo.mem);
                while (byte_count) {
                        uint32_t cur_size_in_bytes = min(byte_count, max_bytes);
 
-                       amdgpu_emit_fill_buffer(adev, &job->ibs[0], src_data,
-                                               dst_addr, cur_size_in_bytes);
+                       amdgpu_vm_set_pte_pde(adev, &job->ibs[0],
+                                       dst_addr, 0,
+                                       cur_size_in_bytes >> 3, 0,
+                                       src_data);
 
                        dst_addr += cur_size_in_bytes;
                        byte_count -= cur_size_in_bytes;
index f137c2458ee874a43b8620b1c32879b3b31b0c3e..0e2399f32de75a2b4c530d067f5e015e4372cd26 100644 (file)
@@ -73,7 +73,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
                       struct dma_fence **fence, bool direct_submit,
                       bool vm_needs_flush);
 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
-                       uint32_t src_data,
+                       uint64_t src_data,
                        struct reservation_object *resv,
                        struct dma_fence **fence);