ARM: dts: sun5i: Add cpu thermal zones to dtsi
authorChen-Yu Tsai <wens@csie.org>
Mon, 12 Jan 2015 04:34:06 +0000 (12:34 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 21 Jan 2015 08:59:10 +0000 (09:59 +0100)
The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun5i-a13.dtsi

index 258ebdc174585bcc54b7a324550ae7461db69556..fd85720ec6a204ca2464206b8a98c890f64b761b 100644 (file)
@@ -13,6 +13,8 @@
 
 #include "skeleton.dtsi"
 
+#include <dt-bindings/thermal/thermal.h>
+
 #include <dt-bindings/dma/sun4i-a10.h>
 #include <dt-bindings/pinctrl/sun4i-a10.h>
 
                };
        };
 
+       thermal-zones {
+               cpu_thermal {
+                       /* milliseconds */
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&rtp>;
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu_alert0>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+
+                       trips {
+                               cpu_alert0: cpu_alert0 {
+                                       /* milliCelsius */
+                                       temperature = <850000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               cpu_crit: cpu_crit {
+                                       /* milliCelsius */
+                                       temperature = <100000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
        memory {
                reg = <0x40000000 0x20000000>;
        };