drm/i915: Flip the sense of AGPBUSY_DIS bit
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 25 Feb 2014 13:13:39 +0000 (15:13 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 5 Jun 2014 06:52:39 +0000 (08:52 +0200)
My Gen3 Bspec lists the AGPBUSY# bit in INSTPM as an enable bit rather
than a disable bit. Our code has the opposite idea. Make the code match
the spec.

Might fix some gen3 C3 related interrupt delivery problems. Untested
due to lack of hardware.

v2: call it AGPBUSY_INT_EN to make it clearer it has to do with interrupts

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c

index 5122254e7213a9879c41be035189f144b8556edc..3427a7fdb882593036f7b0c1601f1ba3a0b3278f 100644 (file)
@@ -1179,7 +1179,7 @@ enum punit_power_well {
 #define   I915_ERROR_INSTRUCTION                       (1<<0)
 #define INSTPM         0x020c0
 #define   INSTPM_SELF_EN (1<<12) /* 915GM only */
-#define   INSTPM_AGPBUSY_DIS (1<<11) /* gen3: when disabled, pending interrupts
+#define   INSTPM_AGPBUSY_INT_EN (1<<11) /* gen3: when disabled, pending interrupts
                                        will not assert AGPBUSY# and will only
                                        be delivered when out of C3. */
 #define   INSTPM_FORCE_ORDERING                                (1<<7) /* GEN6+ */
index 71de9eec33812c9fe6d4bf99d63b86ebc89aebb9..ab98dac3da73a1814ab889fb3d4c07e94e3ee556 100644 (file)
@@ -5506,7 +5506,7 @@ static void gen3_init_clock_gating(struct drm_device *dev)
        I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE));
 
        /* interrupts should cause a wake up from C3 */
-       I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_AGPBUSY_DIS));
+       I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_AGPBUSY_INT_EN));
 }
 
 static void i85x_init_clock_gating(struct drm_device *dev)