drm/nouveau/bios/pll: initial support for BIT 'C' version 2

Just enough to get at the PLL table.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c
index 91a7dc56e406980ccf225fb76f232a9ab1a983fd..2ca23a9157ab9345af8d99681b204ab4cc6f52bd 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c
@@ -77,15 +77,17 @@ g84_pll_mapping[] = {
        {}
 };
 
-static u16
+static u32
 pll_limits_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
 {
        struct bit_entry bit_C;
-       u16 data = 0x0000;
+       u32 data = 0x0000;
 
        if (!bit_entry(bios, 'C', &bit_C)) {
                if (bit_C.version == 1 && bit_C.length >= 10)
                        data = nvbios_rd16(bios, bit_C.offset + 8);
+               if (bit_C.version == 2 && bit_C.length >= 4)
+                       data = nvbios_rd32(bios, bit_C.offset + 0);
                if (data) {
                        *ver = nvbios_rd08(bios, data + 0);
                        *hdr = nvbios_rd08(bios, data + 1);
@@ -137,12 +139,12 @@ pll_map(struct nvkm_bios *bios)
        }
 }
 
-static u16
+static u32
 pll_map_reg(struct nvkm_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len)
 {
        struct pll_mapping *map;
        u8  hdr, cnt;
-       u16 data;
+       u32 data;
 
        data = pll_limits_table(bios, ver, &hdr, &cnt, len);
        if (data && *ver >= 0x30) {
@@ -160,7 +162,7 @@ pll_map_reg(struct nvkm_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len)
        map = pll_map(bios);
        while (map && map->reg) {
                if (map->reg == reg && *ver >= 0x20) {
-                       u16 addr = (data += hdr);
+                       u32 addr = (data += hdr);
                        *type = map->type;
                        while (cnt--) {
                                if (nvbios_rd32(bios, data) == map->reg)
@@ -179,12 +181,12 @@ pll_map_reg(struct nvkm_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len)
        return 0x0000;
 }
 
-static u16
+static u32
 pll_map_type(struct nvkm_bios *bios, u8 type, u32 *reg, u8 *ver, u8 *len)
 {
        struct pll_mapping *map;
        u8  hdr, cnt;
-       u16 data;
+       u32 data;
 
        data = pll_limits_table(bios, ver, &hdr, &cnt, len);
        if (data && *ver >= 0x30) {
@@ -202,7 +204,7 @@ pll_map_type(struct nvkm_bios *bios, u8 type, u32 *reg, u8 *ver, u8 *len)
        map = pll_map(bios);
        while (map && map->reg) {
                if (map->type == type && *ver >= 0x20) {
-                       u16 addr = (data += hdr);
+                       u32 addr = (data += hdr);
                        *reg = map->reg;
                        while (cnt--) {
                                if (nvbios_rd32(bios, data) == map->reg)
@@ -228,7 +230,7 @@ nvbios_pll_parse(struct nvkm_bios *bios, u32 type, struct nvbios_pll *info)
        struct nvkm_device *device = subdev->device;
        u8  ver, len;
        u32 reg = type;
-       u16 data;
+       u32 data;
 
        if (type > PLL_MAX) {
                reg  = type;