return -ENOMEM;
}
- mfc_debug(2, "Instance buf alloc, ctx: %d, size: %ld, addr: 0x%08llx\n",
+ mfc_debug(2, "[MEMINFO] Instance buf ctx[%d] size: %ld, daddr: 0x%08llx\n",
ctx->num, ctx->instance_ctx_buf.size, ctx->instance_ctx_buf.daddr);
return 0;
}
s5p_mfc_mem_ion_free(dev, &ctx->instance_ctx_buf);
- mfc_debug(2, "Release the instance ctx buffer\n");
+ mfc_debug(2, "[MEMINFO] Release the instance buffer ctx[%d]\n", ctx->num);
mfc_debug_leave();
}
break;
}
- for (i = 0; i < ctx->raw_buf.num_planes; i++)
- mfc_debug(2, "Plane[%d] size:%d\n",
- i, ctx->raw_buf.plane_size[i]);
- mfc_debug(2, "MV size: %zu, Totals bufs: %d\n",
- ctx->mv_size, dec->total_dpb_count);
+ mfc_debug(2, "[MEMINFO] scratch: %zu, MV: %zu x count %d\n",
+ ctx->scratch_buf_size, ctx->mv_size, dec->mv_count);
+ if (dec->loop_filter_mpeg4)
+ mfc_debug(2, "[MEMINFO] (loopfilter luma: %zu, chroma: %zu) x count %d\n",
+ ctx->loopfilter_luma_size, ctx->loopfilter_chroma_size,
+ NUM_MPEG4_LF_BUF);
}
static void mfc_calc_enc_codec_buffer_size(struct s5p_mfc_ctx *ctx)
ALIGN(ENC_LUMA_DPB_SIZE(ctx->crop_width, ctx->crop_height), 64);
enc->chroma_dpb_size =
ALIGN(ENC_CHROMA_DPB_SIZE(ctx->crop_width, ctx->crop_height), 64);
- mfc_debug(2, "recon luma size: %zu chroma size: %zu\n",
- enc->luma_dpb_size, enc->chroma_dpb_size);
/* Codecs have different memory requirements */
switch (ctx->codec_mode) {
mfc_err_ctx("invalid codec type: %d\n", ctx->codec_mode);
break;
}
+
+ mfc_debug(2, "[MEMINFO] scratch: %zu, TMV: %zu, (recon luma: %zu, chroma: %zu, me: %zu) x count %d\n",
+ ctx->scratch_buf_size, enc->tmv_buffer_size,
+ enc->luma_dpb_size, enc->chroma_dpb_size, enc->me_buffer_size,
+ ctx->dpb_count);
}
/* Allocate codec buffers */
ctx->codec_buffer_allocated = 1;
}
- mfc_debug(2, "Codec buf alloc, ctx: %d, size: %ld, addr: 0x%08llx\n",
+ mfc_debug(2, "[MEMINFO] Codec buf ctx[%d] size: %ld, addr: 0x%08llx\n",
ctx->num, ctx->codec_buf.size, ctx->codec_buf.daddr);
return 0;
s5p_mfc_mem_ion_free(dev, &ctx->codec_buf);
ctx->codec_buffer_allocated = 0;
- mfc_debug(2, "Release the codec buffer\n");
+ mfc_debug(2, "[MEMINFO] Release the codec buffer ctx[%d]\n", ctx->num);
}
/* Allocation buffer of debug infor memory for FW debugging */
mfc_err_dev("Allocating debug info buffer failed\n");
return -ENOMEM;
}
- mfc_debug(2, "dev->dbg_info_buf.daddr = 0x%08llx, vaddr = 0x%p\n",
- dev->dbg_info_buf.daddr, dev->dbg_info_buf.vaddr);
+ mfc_debug(2, "[MEMINFO] debug info buf size: %ld, daddr: 0x%08llx, vaddr: 0x%p\n",
+ dev->dbg_info_buf.size, dev->dbg_info_buf.daddr, dev->dbg_info_buf.vaddr);
return 0;
}
}
s5p_mfc_mem_ion_free(dev, &dev->dbg_info_buf);
- mfc_debug(2, "Release the debug-info buffer\n");
+ mfc_debug(2, "[MEMINFO] Release the debug info buffer\n");
return 0;
}
mfc_err_ctx("[ROI] Allocating ROI buffer failed\n");
return -ENOMEM;
}
- mfc_debug(2, "[ROI] roi_buf.daddr = 0x%08llx, vaddr = 0x%p\n",
- roi_buf->daddr, roi_buf->vaddr);
+ mfc_debug(2, "[MEMINFO][ROI] roi buf ctx[%d] size: %ld, daddr: 0x%08llx, vaddr: 0x%p\n",
+ ctx->num, roi_buf->size, roi_buf->daddr, roi_buf->vaddr);
memset(roi_buf->vaddr, 0, buf_size->shared_buf);
for (i = 0; i < MFC_MAX_EXTRA_BUF; i++)
if (enc->roi_buf[i].dma_buf)
s5p_mfc_mem_ion_free(ctx->dev, &enc->roi_buf[i]);
+
+ mfc_debug(2, "[MEMINFO][ROI] Release the ROI buffer\n");
}
int s5p_mfc_otf_alloc_stream_buf(struct s5p_mfc_ctx *ctx)
mfc_err_ctx("OTF: Allocating stream buffer failed\n");
return -EINVAL;
}
+ mfc_debug(2, "OTF:[MEMINFO] OTF stream buf[%d] size: %ld, daddr: 0x%08llx, vaddr: 0x%p\n",
+ i, buf->size, buf->daddr, buf->vaddr);
memset(buf->vaddr, 0, raw->total_plane_size);
}
s5p_mfc_mem_ion_free(dev, buf);
}
+ mfc_debug(2, "OTF:[MEMINFO] Release the OTF stream buffer\n");
mfc_debug_leave();
}
mfc_debug_enter();
if (!dev) {
- mfc_err_dev("no mfc device to run\n");
+ mfc_err_dev("[F/W] no mfc device to run\n");
return -EINVAL;
}
if (dev->fw_buf.dma_buf)
return 0;
- mfc_debug(2, "Allocating memory for firmware.\n");
+ mfc_debug(4, "[F/W] Allocating memory for firmware\n");
trace_mfc_loadfw_start(dev->fw.size, firmware_size);
dev->fw_buf.buftype = MFCBUF_NORMAL;
dev->fw_buf.size = dev->fw.size;
if (s5p_mfc_mem_ion_alloc(dev, &dev->fw_buf)) {
- mfc_err_dev("Allocating normal firmware buffer failed\n");
+ mfc_err_dev("[F/W] Allocating normal firmware buffer failed\n");
return -ENOMEM;
}
- mfc_debug(2, "FW normal: 0x%08llx (vaddr: 0x%p), size: %08zu\n",
+ mfc_debug(2, "[MEMINFO][F/W] FW normal: 0x%08llx (vaddr: 0x%p), size: %08zu\n",
dev->fw_buf.daddr, dev->fw_buf.vaddr,
dev->fw_buf.size);
dev->drm_fw_buf.buftype = MFCBUF_DRM_FW;
dev->drm_fw_buf.size = dev->fw.size;
if (s5p_mfc_mem_ion_alloc(dev, &dev->drm_fw_buf)) {
- mfc_err_dev("Allocating DRM firmware buffer failed\n");
+ mfc_err_dev("[F/W] Allocating DRM firmware buffer failed\n");
return -ENOMEM;
}
- mfc_debug(2, "FW DRM: 0x%08llx (vaddr: 0x%p), size: %08zu\n",
+ mfc_debug(2, "[MEMINFO][F/W] FW DRM: 0x%08llx (vaddr: 0x%p), size: %08zu\n",
dev->drm_fw_buf.daddr, dev->drm_fw_buf.vaddr,
dev->drm_fw_buf.size);
#endif
int err;
if (!dev) {
- mfc_err_dev("no mfc device to run\n");
+ mfc_err_dev("[F/W] no mfc device to run\n");
return -EINVAL;
}
/* Firmare has to be present as a separate file or compiled
* into kernel. */
mfc_debug_enter();
- mfc_debug(2, "Requesting fw\n");
+ mfc_debug(4, "[F/W] Requesting F/W\n");
err = request_firmware((const struct firmware **)&fw_blob,
MFC_FW_NAME, dev->v4l2_dev.dev);
if (err != 0) {
- mfc_err_dev("Firmware is not present in the /lib/firmware directory nor compiled in kernel.\n");
+ mfc_err_dev("[F/W] Couldn't find the F/W invalid path\n");
return -EINVAL;
}
- mfc_debug(2, "Ret of request_firmware: %d Size: %zu\n", err, fw_blob->size);
+ mfc_debug(2, "[MEMINFO][F/W] loaded F/W Size: %zu\n", fw_blob->size);
if (fw_blob->size > firmware_size) {
- mfc_err_dev("MFC firmware is too big to be loaded.\n");
+ mfc_err_dev("[MEMINFO][F/W] MFC firmware(%zu) is too big to be loaded in memory(%zu)\n",
+ fw_blob->size, firmware_size);
release_firmware(fw_blob);
return -ENOMEM;
}
if (dev->fw_buf.dma_buf == NULL || dev->fw_buf.daddr == 0) {
- mfc_err_dev("MFC firmware is not allocated or was not mapped correctly.\n");
+ mfc_err_dev("[F/W] MFC firmware is not allocated or was not mapped correctly\n");
release_firmware(fw_blob);
return -EINVAL;
}
memcpy(dev->fw_buf.vaddr, fw_blob->data, fw_blob->size);
if (dev->drm_fw_buf.vaddr) {
memcpy(dev->drm_fw_buf.vaddr, fw_blob->data, fw_blob->size);
- mfc_debug(2, "copy firmware to secure region\n");
+ mfc_debug(4, "[F/W] copy firmware to secure region\n");
}
release_firmware(fw_blob);
trace_mfc_loadfw_end(dev->fw.size, firmware_size);
/* Before calling this function one has to make sure
* that MFC is no longer processing */
if (!dev) {
- mfc_err_dev("no mfc device to run\n");
+ mfc_err_dev("[F/W] no mfc device to run\n");
return -EINVAL;
}
if (!dev->fw_buf.dma_buf) {
- mfc_err_dev("firmware memory is already freed\n");
+ mfc_err_dev("[F/W] firmware memory is already freed\n");
return -EINVAL;
}
fw_buf = &dev->drm_fw_buf;
MFC_WRITEL(fw_buf->daddr, S5P_FIMV_RISC_BASE_ADDRESS);
- mfc_debug(2, "%s F/W Base Address : %08llx\n",
+ mfc_debug(2, "[MEMINFO][F/W] %s Base Address : %#x\n",
buf_type == MFCBUF_DRM ? "DRM" : "NORMAL", fw_buf->daddr);
- MFC_TRACE_DEV("%s F/W Base Address : %08llx\n",
+ MFC_TRACE_DEV("%s F/W Base Address : %#x\n",
buf_type == MFCBUF_DRM ? "DRM" : "NORMAL", fw_buf->daddr);
}
if (dev->fw.fimv_info != 'D' && dev->fw.fimv_info != 'E')
dev->fw.fimv_info = 'N';
- mfc_info_dev("MFC v%x.%x, F/W: %02xyy, %02xmm, %02xdd (%c)\n",
+ mfc_info_dev("[F/W] MFC v%x.%x, %02xyy %02xmm %02xdd (%c)\n",
MFC_VER_MAJOR(dev),
MFC_VER_MINOR(dev),
s5p_mfc_get_fw_ver_year(),
dec->sh_handle.fd = ctrl->value;
if (s5p_mfc_mem_get_user_shared_handle(ctx, &dec->sh_handle))
return -EINVAL;
+ else
+ mfc_debug(2, "[MEMINFO][DPB] shared handle fd: %d, vaddr: 0x%p\n",
+ dec->sh_handle.fd, dec->sh_handle.vaddr);
}
break;
case V4L2_CID_MPEG_MFC_SET_BUF_PROCESS_TYPE:
if (s5p_mfc_mem_get_user_shared_handle(ctx,
&enc->sh_handle_svc))
return -EINVAL;
+ else
+ mfc_debug(2, "[MEMINFO][HIERARCHICAL] shared handle fd: %d, vaddr: 0x%p\n",
+ enc->sh_handle_svc.fd,
+ enc->sh_handle_svc.vaddr);
}
if (ctx_ctrl->id == V4L2_CID_MPEG_MFC51_VIDEO_I_PERIOD_CH &&
p->i_frm_ctrl_mode) {
if (s5p_mfc_mem_get_user_shared_handle(ctx,
&enc->sh_handle_roi))
return -EINVAL;
+ else
+ mfc_debug(2, "[MEMINFO][ROI] shared handle fd: %d, vaddr: 0x%p\n",
+ enc->sh_handle_roi.fd,
+ enc->sh_handle_roi.vaddr);
}
index = enc->roi_index;
memcpy(&enc->roi_info[index],
goto map_kernel_fail;
}
- mfc_debug(2, "User Handle: fd = %d, virtual addr = 0x%p\n",
- handle->fd, handle->vaddr);
-
return 0;
map_kernel_fail:
memset((void *)dev->dbg_info_buf.vaddr, 0, buf_size->dbg_info_buf);
- mfc_debug(2, "MFC debug info set addr(0x%08llx), size(0x%08lx)\n",
- dev->dbg_info_buf.daddr, buf_size->dbg_info_buf);
MFC_WRITEL(dev->dbg_info_buf.daddr, S5P_FIMV_DBG_BUFFER_ADDR);
MFC_WRITEL(buf_size->dbg_info_buf, S5P_FIMV_DBG_BUFFER_SIZE);
}
struct s5p_mfc_dec *dec;
unsigned int i;
size_t frame_size_mv;
- dma_addr_t buf_addr1;
- int buf_size1;
+ dma_addr_t buf_addr;
+ int buf_size;
int align_gap;
struct s5p_mfc_raw_info *raw;
unsigned int reg = 0;
}
raw = &ctx->raw_buf;
- buf_addr1 = ctx->codec_buf.daddr;
- buf_size1 = ctx->codec_buf.size;
+ buf_addr = ctx->codec_buf.daddr;
+ buf_size = ctx->codec_buf.size;
- mfc_debug(2, "Buf1: 0x%p (%d)\n", (void *)buf_addr1, buf_size1);
- mfc_debug(2, "Total DPB COUNT: %d\n", dec->total_dpb_count);
- mfc_debug(2, "Setting display delay to %d\n", dec->display_delay);
+ mfc_debug(2, "[MEMINFO] codec buf 0x%llx size: %d\n", buf_addr, buf_size);
+ mfc_debug(2, "Total DPB COUNT: %d, display delay: %d\n",
+ dec->total_dpb_count, dec->display_delay);
MFC_WRITEL(dec->total_dpb_count, S5P_FIMV_D_NUM_DPB);
mfc_debug(2, "raw->num_planes %d\n", raw->num_planes);
MFC_WRITEL(raw->plane_size[i], S5P_FIMV_D_FIRST_PLANE_DPB_SIZE + (i * 4));
}
- MFC_WRITEL(buf_addr1, S5P_FIMV_D_SCRATCH_BUFFER_ADDR);
+ MFC_WRITEL(buf_addr, S5P_FIMV_D_SCRATCH_BUFFER_ADDR);
MFC_WRITEL(ctx->scratch_buf_size, S5P_FIMV_D_SCRATCH_BUFFER_SIZE);
- buf_addr1 += ctx->scratch_buf_size;
- buf_size1 -= ctx->scratch_buf_size;
+ buf_addr += ctx->scratch_buf_size;
+ buf_size -= ctx->scratch_buf_size;
if (IS_H264_DEC(ctx) || IS_H264_MVC_DEC(ctx) || IS_HEVC_DEC(ctx) || IS_BPG_DEC(ctx))
MFC_WRITEL(ctx->mv_size, S5P_FIMV_D_MV_BUFFER_SIZE);
if (IS_VP9_DEC(ctx)){
- MFC_WRITEL(buf_addr1, S5P_FIMV_D_STATIC_BUFFER_ADDR);
+ MFC_WRITEL(buf_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR);
MFC_WRITEL(DEC_STATIC_BUFFER_SIZE, S5P_FIMV_D_STATIC_BUFFER_SIZE);
- buf_addr1 += DEC_STATIC_BUFFER_SIZE;
- buf_size1 -= DEC_STATIC_BUFFER_SIZE;
+ buf_addr += DEC_STATIC_BUFFER_SIZE;
+ buf_size -= DEC_STATIC_BUFFER_SIZE;
}
if (IS_MPEG4_DEC(ctx) && dec->loop_filter_mpeg4) {
mfc_debug(2, "Add DPB for loop filter of MPEG4\n");
for (i = 0; i < NUM_MPEG4_LF_BUF; i++) {
- MFC_WRITEL(buf_addr1, S5P_FIMV_D_POST_FILTER_LUMA_DPB0 + (4 * i));
- buf_addr1 += ctx->loopfilter_luma_size;
- buf_size1 -= ctx->loopfilter_luma_size;
+ MFC_WRITEL(buf_addr, S5P_FIMV_D_POST_FILTER_LUMA_DPB0 + (4 * i));
+ buf_addr += ctx->loopfilter_luma_size;
+ buf_size -= ctx->loopfilter_luma_size;
- MFC_WRITEL(buf_addr1, S5P_FIMV_D_POST_FILTER_CHROMA_DPB0 + (4 * i));
- buf_addr1 += ctx->loopfilter_chroma_size;
- buf_size1 -= ctx->loopfilter_chroma_size;
+ MFC_WRITEL(buf_addr, S5P_FIMV_D_POST_FILTER_CHROMA_DPB0 + (4 * i));
+ buf_addr += ctx->loopfilter_chroma_size;
+ buf_size -= ctx->loopfilter_chroma_size;
}
reg |= ((dec->loop_filter_mpeg4 & S5P_FIMV_D_INIT_BUF_OPT_LF_CTRL_MASK)
<< S5P_FIMV_D_INIT_BUF_OPT_LF_CTRL_SHIFT);
MFC_WRITEL(reg, S5P_FIMV_D_INIT_BUFFER_OPTIONS);
- frame_size_mv = ctx->mv_size;
- mfc_debug(2, "Frame size: %d, %d, %d, mv: %ld, scratch: %ld\n",
- raw->plane_size[0], raw->plane_size[1],
- raw->plane_size[2], frame_size_mv,
- ctx->scratch_buf_size);
-
/* set decoder stride size */
for (i = 0; i < ctx->raw_buf.num_planes; i++) {
MFC_WRITEL(ctx->raw_buf.stride[i],
}
}
+ frame_size_mv = ctx->mv_size;
MFC_WRITEL(dec->mv_count, S5P_FIMV_D_NUM_MV);
if (IS_H264_DEC(ctx) || IS_H264_MVC_DEC(ctx) || IS_HEVC_DEC(ctx) || IS_BPG_DEC(ctx)) {
for (i = 0; i < dec->mv_count; i++) {
/* To test alignment */
- align_gap = buf_addr1;
- buf_addr1 = ALIGN(buf_addr1, 16);
- align_gap = buf_addr1 - align_gap;
- buf_size1 -= align_gap;
-
- mfc_debug(2, "\tBuf1: 0x%p, size: %d\n", (void *)buf_addr1, buf_size1);
- MFC_WRITEL(buf_addr1, S5P_FIMV_D_MV_BUFFER0 + i * 4);
- buf_addr1 += frame_size_mv;
- buf_size1 -= frame_size_mv;
+ align_gap = buf_addr;
+ buf_addr = ALIGN(buf_addr, 16);
+ align_gap = buf_addr - align_gap;
+ buf_size -= align_gap;
+
+ MFC_WRITEL(buf_addr, S5P_FIMV_D_MV_BUFFER0 + i * 4);
+ buf_addr += frame_size_mv;
+ buf_size -= frame_size_mv;
}
}
- mfc_debug(2, "Buf1: 0x%p, buf_size1: %d (frames %d)\n",
- (void *)buf_addr1, buf_size1, dec->total_dpb_count);
- if (buf_size1 < 0) {
- mfc_debug(2, "Not enough memory has been allocated.\n");
+ mfc_debug(2, "[MEMINFO] codec buf 0x%llx, remained size: %d\n", buf_addr, buf_size);
+ if (buf_size < 0) {
+ mfc_debug(2, "[MEMINFO] Not enough memory has been allocated\n");
return -ENOMEM;
}
- mfc_debug(2, "After setting buffers.\n");
return 0;
}
{
struct s5p_mfc_dev *dev = ctx->dev;
struct s5p_mfc_enc *enc = ctx->enc_priv;
- dma_addr_t buf_addr1;
- int buf_size1;
+ dma_addr_t buf_addr;
+ int buf_size;
int i;
mfc_debug_enter();
- buf_addr1 = ctx->codec_buf.daddr;
- buf_size1 = ctx->codec_buf.size;
+ buf_addr = ctx->codec_buf.daddr;
+ buf_size = ctx->codec_buf.size;
- mfc_debug(2, "Buf1: 0x%p (%d)\n", (void *)buf_addr1, buf_size1);
+ mfc_debug(2, "[MEMINFO] codec buf 0x%llx, size: %d\n", buf_addr, buf_size);
+ mfc_debug(2, "DPB COUNT: %d\n", ctx->dpb_count);
- MFC_WRITEL(buf_addr1, S5P_FIMV_E_SCRATCH_BUFFER_ADDR);
+ MFC_WRITEL(buf_addr, S5P_FIMV_E_SCRATCH_BUFFER_ADDR);
MFC_WRITEL(ctx->scratch_buf_size, S5P_FIMV_E_SCRATCH_BUFFER_SIZE);
- buf_addr1 += ctx->scratch_buf_size;
- buf_size1 -= ctx->scratch_buf_size;
+ buf_addr += ctx->scratch_buf_size;
+ buf_size -= ctx->scratch_buf_size;
/* start address of per buffer is aligned */
for (i = 0; i < ctx->dpb_count; i++) {
- MFC_WRITEL(buf_addr1, S5P_FIMV_E_LUMA_DPB + (4 * i));
- buf_addr1 += enc->luma_dpb_size;
- buf_size1 -= enc->luma_dpb_size;
+ MFC_WRITEL(buf_addr, S5P_FIMV_E_LUMA_DPB + (4 * i));
+ buf_addr += enc->luma_dpb_size;
+ buf_size -= enc->luma_dpb_size;
}
for (i = 0; i < ctx->dpb_count; i++) {
- MFC_WRITEL(buf_addr1, S5P_FIMV_E_CHROMA_DPB + (4 * i));
- buf_addr1 += enc->chroma_dpb_size;
- buf_size1 -= enc->chroma_dpb_size;
+ MFC_WRITEL(buf_addr, S5P_FIMV_E_CHROMA_DPB + (4 * i));
+ buf_addr += enc->chroma_dpb_size;
+ buf_size -= enc->chroma_dpb_size;
}
for (i = 0; i < ctx->dpb_count; i++) {
- MFC_WRITEL(buf_addr1, S5P_FIMV_E_ME_BUFFER + (4 * i));
- buf_addr1 += enc->me_buffer_size;
- buf_size1 -= enc->me_buffer_size;
+ MFC_WRITEL(buf_addr, S5P_FIMV_E_ME_BUFFER + (4 * i));
+ buf_addr += enc->me_buffer_size;
+ buf_size -= enc->me_buffer_size;
}
- MFC_WRITEL(buf_addr1, S5P_FIMV_E_TMV_BUFFER0);
- buf_addr1 += enc->tmv_buffer_size >> 1;
- MFC_WRITEL(buf_addr1, S5P_FIMV_E_TMV_BUFFER1);
- buf_addr1 += enc->tmv_buffer_size >> 1;
- buf_size1 -= enc->tmv_buffer_size;
+ MFC_WRITEL(buf_addr, S5P_FIMV_E_TMV_BUFFER0);
+ buf_addr += enc->tmv_buffer_size >> 1;
+ MFC_WRITEL(buf_addr, S5P_FIMV_E_TMV_BUFFER1);
+ buf_addr += enc->tmv_buffer_size >> 1;
+ buf_size -= enc->tmv_buffer_size;
- mfc_debug(2, "Buf1 end: 0x%p, buf_size1: %d (ref frames %d)\n",
- (void *)buf_addr1, buf_size1, ctx->dpb_count);
- if (buf_size1 < 0) {
- mfc_debug(2, "Not enough memory has been allocated.\n");
+ mfc_debug(2, "[MEMINFO] codec buf 0x%llx, remained size: %d\n", buf_addr, buf_size);
+ if (buf_size < 0) {
+ mfc_debug(2, "[MEMINFO] Not enough memory has been allocated\n");
return -ENOMEM;
}
projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / commitdiff