x86, intel: Use c->microcode for Atom errata check

Now that the cpu update level is available the Atom PSE errata
check can use it directly without reading the MSR again.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Link: http://lkml.kernel.org/r/1318466795-7393-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 26627a3a7148b3f53688a74a0842aba97dbfb9a2..523131213f084c8b4696563410b0cd60f1ccf623 100644 (file)
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -64,17 +64,10 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
         * need the microcode to have already been loaded... so if it is
         * not, recommend a BIOS update and disable large pages.
         */
-       if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_mask <= 2) {
-               u32 ucode, junk;
-
-               wrmsr(MSR_IA32_UCODE_REV, 0, 0);
-               sync_core();
-               rdmsr(MSR_IA32_UCODE_REV, junk, ucode);
-
-               if (ucode < 0x20e) {
-                       printk(KERN_WARNING "Atom PSE erratum detected, BIOS microcode update recommended\n");
-                       clear_cpu_cap(c, X86_FEATURE_PSE);
-               }
+       if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_mask <= 2 &&
+           c->microcode < 0x20e) {
+               printk(KERN_WARNING "Atom PSE erratum detected, BIOS microcode update recommended\n");
+               clear_cpu_cap(c, X86_FEATURE_PSE);
        }
 
 #ifdef CONFIG_X86_64