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ARM: dts: rockchip: initialize rk3066 PLL clock rate
author
Paweł Jarosz
<paweljarosz3691@gmail.com>
Fri, 14 Oct 2016 12:16:54 +0000
(14:16 +0200)
committer
Heiko Stuebner
<heiko@sntech.de>
Fri, 21 Oct 2016 13:42:53 +0000
(15:42 +0200)
Initialize PLL, cpu bus and peripherial bus rate while kernel init.
No other module does than.
This gives us performance boost observable for example in mmc transfers.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3066a.dtsi
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diff --git
a/arch/arm/boot/dts/rk3066a.dtsi
b/arch/arm/boot/dts/rk3066a.dtsi
index b8c83d80593f95f31ad6584e3ac4d25ec68f1e02..f3a51099f5e03ead4d938047acdf3305b1ab1c5a 100644
(file)
--- a/
arch/arm/boot/dts/rk3066a.dtsi
+++ b/
arch/arm/boot/dts/rk3066a.dtsi
@@
-151,6
+151,14
@@
#clock-cells = <1>;
#reset-cells = <1>;
+ assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
+ <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+ <&cru PCLK_CPU>, <&cru ACLK_PERI>,
+ <&cru HCLK_PERI>, <&cru PCLK_PERI>;
+ assigned-clock-rates = <400000000>, <594000000>,
+ <300000000>, <150000000>,
+ <75000000>, <300000000>,
+ <150000000>, <75000000>;
};
timer@2000e000 {