[POWERPC] FSL: Access PCIe LTSSM register with correct size

The LTSSM register is actual 32-bits wide so we should be doing a
dword access.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 98290f4ef3dfbd4696f10bf54aaf245b3e51844a..af090c93be10e205a536e4782d96902feab862cb 100644 (file)
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -160,8 +160,8 @@ static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev)
 
 int __init fsl_pcie_check_link(struct pci_controller *hose)
 {
-       u16 val;
-       early_read_config_word(hose, 0, 0, PCIE_LTSSM, &val);
+       u32 val;
+       early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
        if (val < PCIE_LTSSM_L0)
                return 1;
        return 0;